EPM having an improvement in non-volatile memory organization

• US 5,758,330 A
• Filed: 08/23/1993
• Issued: 05/26/1998
• Est. Priority Date: 12/30/1988
• Status: Expired due to Fees

• Current Assignee: Pitney Bowes Incorporated (Böwe Systec AG)
• Original Assignee: Pitney Bowes Incorporated (Böwe Systec AG)
• Inventors: Brown, Nanette
• Primary Examiner(s): Cosimano, Edward R.
• Application Number:
  US08/109,982
• Time in Patent Office: 1,737 Days
• Field of Search: 364/464.02, 364/464.03, 371/21.6, 705/400, 705/401, 705/405, 705/410
• US Class Current: 705/405
• CPC Class Codes: G06F 11/0754 by exceeding limits
• CPC Class Codes: G06F 11/1004 to protect a block of data words, e.g. CRC or checksum G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00
• CPC Class Codes: G07B 17/00314 Communication within apparatus, personal computer [PC] system, or server, e.g. between printhead and central unit in a franking machine
• CPC Class Codes: G07B 17/00362 Calculation or computing within apparatus, e.g. calculation of postage value
• CPC Class Codes: G07B 2017/00338 Error detection or handling
• CPC Class Codes: G07B 2017/00395 Memory organization
• CPC Class Codes: G07B 2017/00411 Redundant storage, e.g. back-up of registers
• CPC Class Codes: G11C 29/70 Masking faults in memories by using spares or by reconfiguring
• CPC Class Codes: G11C 29/74 using duplex memories, i.e. using dual copies
• CPC Class Codes: G11C 29/88 with partially good memories

Abstract

An electronic postage meter has non-volatile memories storing postage meter data under control of the CPU operating from a program in ROM. The data in non-volatile memory is organized into buffers of related data for ease of access. The memory is segmented and such segment has a corresponding bit in a bit map buffer which may be turned on or off in accordance with the good or bad status of the segment. The ROM stores initial entry into the non-volatile memory which is updated in the CPU'"'"'s working memory in accordance with the data stored in the bit map buffer of the non-volatile memory.

Claims

1. A method for organizing data in a postage meter microcontrol system, said postage meter microcontrol system having a plurality of non-volatile memory, a CPU and a Read Only Memory (ROM) comprising the steps of:

(a) allocating a plurality of data stores for a first one of said non-volatile memories, each data store having a plurality of buffers, said plurality of buffers containing related data items;

(b) allocating a plurality of data stores for a second one of said non-volatile memories, each data store having a plurality of buffers containing redundant data to a respective one of said buffers in said first one of said non-volatile memory;

(c) providing a data store in each of said non-volatile memories which data store includes a bit map buffer having first data therein relating to the status of each of a plurality of buffers of said respective non-volatile memory and said respective bit map buffers includes status data only for that respective non-volatile memory wherein said first data has a first state and a second state;

(d) providing and entry table of addresses in said ROM for accessing the data store in each of said respective non-volatile memories;

(e) determining a current buffer address for accessing said respective non-volatile memories in accordance with the data in said ROM table and said non-volatile memory bit map;

(f) calculating and storing an associated CRC for only those data stores having said respective first data in a first state in each of said buffers of said respective non-volatile memories wherein said CRC has a first state representing a good data store buffer and a second state representing a bad data store buffer;

(g) setting said first data to said first state when said second CRC is in a first state and, or to said second state when said CRC is in said second state; and

,

(h) programming said microcontrol system to access only those data stores wherein said first data is in said first state.

2. A method for organizing data in a postage meter microcontrol system, said postage meter microcontrol system having a plurality of non-volatile memory, a CPU and a Read Only Memory (ROM) comprising the steps of:

(a) allocating a plurality of data stores for a first one of said non-volatile memories, each data store having a plurality of buffers, said plurality of buffers containing related data items;

(b) providing a data store in each of said non-volatile memories which data store includes a bit map buffer having first data therein relating to the status of each of a plurality of buffers of said respective non-volatile memory and said respective bit map buffers includes status data only for that respective non-volatile memory wherein said first data has a first state and a second state;

(c) providing and entry table of addresses in said ROM for accessing the data store in each of said respective non-volatile memories;

(d) determining a current buffer address for accessing said respective non-volatile memories in accordance with the data in said ROM table and said non-volatile memory bit map;

(e) calculating and storing an associated CRC for only those data stores having said respective first data in a first state in each of said buffers of said respective non-volatile memories wherein said CRC has a first state representing a good data store buffer and a second state representing a bad data store buffer;

(f) setting said first data to said first state when said CRC is in a first state or to said second state when said CRC is in said second state; and

,

(g) programming said microcontrol system to access only those data stores wherein said first data is in said first state.

3. A method for organizing data in a postage meter micro control system, said postage meter micro control system having a non-volatile memory, a CPU and a Read Only Memory (ROM) comprising the steps of:

(a) allocating a plurality of data stores for said non-volatile memories, each data store having a plurality of buffers, said plurality of buffers containing related data items,

(b) providing a data store in each of said non-volatile memories which data store includes a bit map buffer having first data therein relating to the status of each of a plurality of buffers of said respective non-volatile memory and said respective bit map buffers includes status data only for that respective non-volatile memory wherein said first data has a first state and a second state;

(c) providing and entry table of addresses in said ROM for accessing the data store in each of said respective non-volatile memories;

(d) determining a current buffer address for accessing said non-volatile memories in accordance with the data in said ROM table and said non-volatile memory bit map; and

,

(e) calculating and storing an associated CRC for only those data stores having said respective first data in a first state in each of said buffers of said non-volatile memories wherein said CRC has a first state representing a good data store buffer and a second state representing a bad data store buffer;

(f) setting said first data to said first state when said CRC is in a first state or to said second state when said CRC is in said state;

(g) programming said micro control system to access only those data stores wherein said first data is in said first state; and

(h) programming said micro control system to access only those data stores wherein said first data is in said first state.