Moisture barrier layers for integrated circuit applications

• US 5,760,453 A
• Filed: 09/03/1997
• Issued: 06/02/1998
• Est. Priority Date: 03/20/1996
• Status: Expired due to Term

• Current Assignee: Vanguard International Semiconductor Corporation
• Original Assignee: Vanguard International Semiconductor Corporation
• Inventors: Chen, Chung-Zen
• Primary Examiner(s): WALLACE, VALENCIA MARTIN
• Application Number:
  US08/922,760
• Time in Patent Office: 272 Days
• Field of Search: 257/209, 257/529, 257/641, 438/540, 438/601
• US Class Current: 257/529
• CPC Class Codes: H01L 23/291 Oxides or nitrides or carbides, e.g. ceramics, glass
• CPC Class Codes: H01L 23/5258 the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
• CPC Class Codes: H01L 23/564 Details not otherwise provided for, e.g. protection against moisture getters H01L23/26
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 148/055 Fuse
• CPC Class Codes: Y10S 438/94 Laser ablative material removal

Abstract

The structure and method is provided which prevents moisture and contamination from diffusing through openings (e.g., fuse windows) in insulating layers to product devices. Three moisture barrier layers form a moisture impervious boundary system to prevent moisture from diffusing from a fuse window into other overlying layers and into product devices. First and second barrier layers are formed insulation layers below the fuse. A third barrier layer is formed over an uppermost insulation layer, the sidewalls of a fuse window and over the fuse. The first and third barrier layers form a seal in the fuse area. The method comprises forming an insulating layer 52 54 over portions of said substrate 50 including in said fuse window area 63. A first barrier layer 56, a first interlevel dielectric layer 58 are formed over the insulating layer. A second barrier layer 60 is formed over said first interlevel dielectric layer 58. Then a fuse 62 and overlying insulating and conductive layers 66 70 are formed over said fuse 62. Next, a fuse window 73 is formed through said insulating and conductive layers exposing the fuse and the first barrier layer. A third barrier layer 72 is formed over the fuse window, the fuse and the first barrier layer in the fuse window area.

Claims

1. A moisture barrier system for an integrated circuit on a substrate;

comprising;

a) a substrate having a fuse window area and device areas;

b) a field oxide region over portions of said substrate including said fuse window area;

c) a first insulating layer over said field oxide layer and said substrate;

d) a first barrier layer composed of a moisture impervious material over said first insulating layer;

e) a first interlevel dielectric layer over said first barrier layer;

f) a second barrier layer composed of a moisture impervious material over said first interlevel dielectric layer;

g) a fuse over said second barrier layer at least across said fuse window area;

h) a second interlevel dielectric layer over said fuse and said second barrier layer; and

said second interlevel dielectric layer having vias that expose portions of said fuse;

i) a first metal layer over said second interlevel dielectric layer and in said vias;

j) an inter metal dielectric layer and a first passivation layer over said first metal layer;

k) a fuse window though said first interlevel dielectric layer, said second interlevel dielectric layer, said inter metal dielectric layer, and a first passivation layer not covering said fuse in said fuse window area;

said fuse window having vertical sidewalls; and

l) a third barrier layer composed of a moisture impervious material over said first passivation layer and over the sidewalls of said fuse window and said exposed fuse;

said third barrier layer forming a moisture proof seal with said first barrier layer in said fuse window area.

2. The moisture barrier system of claim 1 wherein said first insulating layer is formed of silicon oxide formed using tetraethylorthosilicate and has a thickness in the range of between about 1000 and 2000 Å

.

3. The moisture barrier claim 1 wherein said first barrier layer is composed of a silicon nitride and has an overall thickness in the range of between about 200 and 500 Å

.

4. The moisture barrier system of claim 1 wherein said first barrier layer 56 is composed of a three film structure of silicon oxide/silicon nitride/silicon oxide and has an overall thickness in the range of between about 300 and 600 Å

.

5. The moisture barrier system of claim 1 wherein said first interlevel dielectric layer is composed of borophosphosilicate glass (BPSG) and has a thickness in the range between about 3000 and 5000 Å

.

6. The moisture barrier system of claim 1 wherein said second barrier layer (SiN) is composed of silicon nitride and has thickness in the range between about 200 and 500 Å

.

7. The moisture barrier system of claim 1 wherein said fuse is composed of a material selected from the group consisting of:

polysilicon, tungsten suicide, and polycide.

8. The moisture barrier system of claim 1 wherein second interlevel dielectric layer is composed of borophosphosilicate glass (BPSG) and has a thickness in the range between about 3000 and 5000 Å

.

9. The moisture barrier system of claim 1 wherein said third barrier layer is composed of silicon nitride and has a thickness in the range between about 5000 and 10,000 Å

.