Multi-layer electrical interconnection structures
First Claim
1. A multi-layer electrical interconnection structure comprising:
- a substrate;
a plurality of conductors which are screen printed over the substrate, the screen-printed conductors having upper-level portions and lower-level portions;
a plurality of bond wire interconnections extending between the upper-level portions and the lower-level portions of individual screen-printed conductors, the bond wire interconnections creating inter-level electrical connections between the upper-level and lower-level portions of said individual screen-printed conductors; and
further comprising;
a semiconductor die positioned over the substrate, the semiconductor die having die bond pads which face the substrate, the die bond pads being aligned with the upper-level portions of said individual screen-printed conductors; and
conductive bonds between the aligned die bond pads and the upper-level portions of said individual screen-printed conductors.
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Accused Products
Abstract
A flat-panel field emission display comprises a luminescent faceplate, a rigid backplate, and an interposed or sandwiched emitter or cathode plate. A dielectric connector ridge is screen-printed over the faceplate'"'"'s rear surface. Upper and lower level conductors are then screen printed over the faceplate. The lower-level conductors are applied directly on the faceplate rear surface. The upper-level conductors are applied atop the connector ridge. A plurality of bond wire interconnections extend between individual screen-printed conductors of the upper and lower levels. The bond wire interconnections create inter-level electrical interconnections between said individual screen-printed conductors. The cathode plate is positioned over the connector ridge. The cathode plate has a plurality of die bond pads facing the faceplate rear surface and aligned with the upper-level conductors. A plurality of conductive bonds such as flip-chip connections are positioned between the die bond pads and the facing upper-level conductors.
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Citations
12 Claims
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1. A multi-layer electrical interconnection structure comprising:
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a substrate; a plurality of conductors which are screen printed over the substrate, the screen-printed conductors having upper-level portions and lower-level portions; a plurality of bond wire interconnections extending between the upper-level portions and the lower-level portions of individual screen-printed conductors, the bond wire interconnections creating inter-level electrical connections between the upper-level and lower-level portions of said individual screen-printed conductors; and further comprising; a semiconductor die positioned over the substrate, the semiconductor die having die bond pads which face the substrate, the die bond pads being aligned with the upper-level portions of said individual screen-printed conductors; and conductive bonds between the aligned die bond pads and the upper-level portions of said individual screen-printed conductors.
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2. A multi-layer electrical interconnection structure comprising:
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a substrate; a plurality of conductors which are screen printed over the substrate, the screen-printed conductors having upper-level portions and lower-level portions; a plurality of bond wire interconnections extending between the upper-level portions and the lower-level portions of individual screen-printed conductors, the bond wire interconnections creating inter-level electrical connections between the upper-level and lower-level portions of said individual screen-printed conductors; and further comprising; a semiconductor die positioned over the substrate, the semiconductor die having die bond pads which face the substrate, the die bond pads being aligned with the upper-level portions of said individual screen-printed conductors; and conductive metal bumps between the aligned die bond pads and the upper-level portions of said individual screen-printed conductors, the conductive metal bumps forming conductive bonds between the aligned die bond pads and the upper-level portions of said individual screen-printed conductors.
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3. A multi-layer electrical interconnection structure comprising:
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a substrate; a screen-printed dielectric layer over the substrate; a lower level of screen-printed conductors over the substrate at a first elevation; an upper level of screen-printed conductors overlying the screen-printed dielectric layer at a second elevation which is greater than the first elevation; a plurality of bond wire interconnections extending between individual screen-printed conductors of the upper and lower levels, the bond wire interconnections creating inter-level electrical connections between said individual screen-printed conductors of the upper and lower levels; and further comprising a semiconductor die having a plurality of die bond pads facing the substrate and aligned with individual upper-level screen-printed conductors, the die bond pads being conductively bonded to said individual upper-level screen-printed conductors.
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4. A multi-layer electrical interconnection structure comprising:
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a substrate; a screen-printed dielectric layer over the substrate; a lower level of screen-printed conductors over the substrate at a first elevation; an upper level of screen-printed conductors overlying the screen-printed dielectric layer at a second elevation which is greater than the first elevation; a plurality of bond wire interconnections extending between individual screen-printed conductors of the upper and lower levels, the bond wire interconnections creating inter-level electrical connections between said individual screen-printed conductors of the upper and lower levels; and further comprising; a semiconductor die having a plurality of die bond pads facing the substrate and aligned with individual upper-level screen-printed conductors; and a plurality of conductive metal bumps between the aligned die bond pads and individual upper-level screen-printed conductors, the conductive metal bumps forming conductive bonds between the die bond pads and said individual upper-level screen-printed conductors.
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5. A multi-layer electrical interconnection structure comprising:
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a substrate; a screen-printed dielectric layer over the substrate; a lower level of screen-printed conductors over the substrate at a first elevation; an upper level of screen-printed conductors overlying the screen-printed dielectric layer at a second elevation which is greater than the first elevation; a plurality of bond wire interconnections extending between individual screen-printed conductors of the upper and lower levels, the bond wire interconnections creating inter-level electrical connections between said individual screen-printed conductors of the upper and lower levels; and further comprising; a semiconductor die having a plurality of die bond pads facing the substrate and aligned with the individual upper-level screen-printed conductors; and a plurality of flip-chip connections between the die bond pads and said individual upper-level screen-printed conductors.
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6. A multi-layer electrical interconnection structure comprising:
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a substrate; a screen-printed dielectric layer over the substrate; a lower level of screen-printed conductors over the substrate at a first elevation; an upper level of screen-printed conductors overlying the screen-printed dielectric layer at a second elevation which is greater than the first elevation; a plurality of bond wire interconnections extending between individual screen-printed conductors of the upper and lower levels, the bond wire interconnections creating inter-level electrical connections between said individual screen-printed conductors of the upper and lower levels; and further comprising; a semiconductor die having a plurality of die bond pads facing the substrate; and a plurality of bond wire stubs bonded either to said individual upper-level screen-printed conductors or to the die bond pads, the bond wire stubs having projecting tails of bond wire which are interposed between said individual upper-level screen-printed conductors and the die bond pads to form conductive bonds therebetween.
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7. A multi-layer electrical interconnection structure comprising:
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a substrate; a screen-printed dielectric layer over the substrate; a lower level of screen-printed conductors over the substrate at a first elevation; an upper level of screen-printed conductors overlying the screen-printed dielectric layer at a second elevation which is greater than the first elevation; a plurality of bond wire interconnections extending between individual screen-printed conductors of the upper and lower levels, the bond wire interconnections creating inter-level electrical connections between said individual screen-printed conductors of the upper and lower levels; and further comprising; a semiconductor die having a plurality of die bond pads facing the substrate; a plurality of bond wire wedge bonds formed either on said individual upper-level screen-printed conductors or on the die bond pads; and tails of bond wire which project from the wedge bonds, the bond wire tails being interposed between said individual upper-level screen-printed conductors and the die bond pads to form conductive bonds therebetween.
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8. A multi-layer interconnection structure comprising:
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a substrate having a planar surface; a connector ridge formed over the substrate; a lower level of conductors applied over the substrate; an upper level of conductors applied atop the connector ridge; a plurality of bond wire interconnections between individual conductors of the upper and lower levels, the bond wire interconnections creating inter-level electrical interconnections between said individual conductors of the upper and lower levels; a semiconductor die positioned over the connector ridge, the semiconductor die having a plurality of die bond pads facing the substrate and aligned with the upper-level conductors; and a plurality of conductive bonds between individual die bond pads and the facing upper-level conductors. - View Dependent Claims (9, 10, 11, 12)
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Specification