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Phase-locked loop for clock recovery

  • US 5,760,653 A
  • Filed: 05/30/1996
  • Issued: 06/02/1998
  • Est. Priority Date: 05/31/1995
  • Status: Expired due to Fees
First Claim
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1. A circuit comprising:

  • a pulse generator generating a pulse signal of a predetermined pulse width at each level transition of an input signal having an NRZ (non return to zero) signaling method;

    a detector detecting a voltage signal corresponding to a voltage of a periodic signal at a time corresponding to each pulse of the pulse signal;

    a storage device storing the voltage signal detected at the time of each pulse; and

    an oscillator generating the periodic signal whose frequency is controlled based on the voltage signal stored in the storage device.

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