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Dual domain data processing network with cross-linking data queues and selective priority arbitration logic

  • US 5,761,445 A
  • Filed: 04/26/1996
  • Issued: 06/02/1998
  • Est. Priority Date: 04/26/1996
  • Status: Expired due to Term
First Claim
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1. A data processing network linking two separate first local and second remote data processing systems for enabling the transmission of Read/Write commands and messages between sending/receiving modules within each first local or each second remote data processing system or between modules of said first local and second remote data processing systems, said network comprising:

  • (a) a first local data processing system and second remote data processing system, each said system including;

    (a1) a common system bus means;

    (a2) a Central Processing Module (CPM), an Input/Output module (IOM), a Bus Exchange Module (BEM), and System Control Module (SCM), each of which is connected to said common system bus means;

    (a3) said Central Processing Module (CPM) having a cache memory means and an invalidation register queue for holding addresses of bus Write OPs which are to be invalidated in said cache memory means;

    (a4) said bus exchange module (BEM) having (i) a message queue for holding multiple numbers of messages being transmitted between said first local system and said second remote system, and (ii) a snoop-Write address queue for storing Write OP addresses snooped from said common system bus means for subsequent passage to said invalidation register queue;

    (a5) said system control module (SCM) including an arbiter means for selectively regulating access priority to said common system bus means for bus access requests from said CPM, IOM and BEM, said arbiter means including;

    (i) means for granting first priority of a bus access to said BEM when it has a pending request to said common system bus means;

    (ii) means for granting second priority of bus access to said IOM if the CPM was the last module served with access to said common system bus means;

    (iii) means for granting second priority of bus access to said CPM if the IOM was the last module served with access to said common system bus means;

    (iv) means, when said BEM, CPM and IOM are simultaneously contending for access to said common system bus means, to grant bus access priority first to said BEM and then grant second priority of bus access to said CPM and IOM according to which module did not have the last system bus access;

    (v) means for delaying the assertion of priority by each of said BEM'"'"'s until the BEM has completely filled its message queue or its write address queue.

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