Switching amplifiers into and out of circuits with reduced output noise

• US 5,764,103 A
• Filed: 07/17/1996
• Issued: 06/09/1998
• Est. Priority Date: 07/17/1996
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Burra, Gangadhar, Ferguson, Paul F. Jr.
• Primary Examiner(s): Mullins, James B.
• Application Number:
  US08/682,129
• Time in Patent Office: 692 Days
• Field of Search: 330/9, 330/51, 330/149
• US Class Current: 330/51
• CPC Class Codes: H03F 1/303 using a switching device H03F1/305, H03F3/005, H03F3/38 take precedence

Abstract

An insubstantial amount of noise results at the output of a circuit when an output of a primary amplifier is disconnected from and reconnected to the circuit in which is operating. The primary amplifier is placed temporarily in a muting configuration. A secondary amplifier permanently in a muting configuration is connected in parallel with the primary amplifier. The output of the primary amplifier then is disconnected from a circuit node to which it is attached. The primary amplifier may then be taken out of its muting configuration. After, for example, configuring the primary amplifier as a comparator and calibrating its dc-offset voltage, the primary amplifier is placed back into a muting configuration. The secondary amplifier then is disconnected from the primary amplifier. The primary amplifier may subsequently be taken out of muting configuration to resume its normal function in the circuit.

Claims

1. An amplifier circuit, comprising:

an input lead to receive an input signal;

a main amplifier including;

a first stage having a first input coupled to the input lead to receive the input signal, and a first output to provide a first stage output signal; and

a second stage having a second input switchably coupled to the first output to receive the first stage output signal, and a second output to provide an output signal to an output lead of the amplifier circuit; and

a catching amplifier coupled to the second stage during at least one time interval so as to cause a gain of approximately zero to result between the input lead and the output lead during the at least one time interval, the main amplifier being arranged such that the first output is uncoupled from the second input during at least a portion of the at least one time interval.

2. The amplifier circuit as claimed in claim 1, wherein the catching amplifier is switchably coupled to the main amplifier via at least one catching switch configured to selectively couple at least one circuit node of the catching amplifier to at least one of the second input and the second output of the main amplifier, and the second input is switchably coupled to the first output via an uncoupling switch configured to selectively uncouple the first output from the second input.

3. The amplifier circuit as claimed in claim 1, wherein the catching amplifier includes a non-inverting input and an inverting input, and an output of the catching amplifier is connected to the inverting input and the non-inverting input is connected to a constant voltage circuit node.

4. The amplifier circuit as claimed in claim 1, wherein the catching amplifier includes a first catching stage and a second catching stage, an output of the first catching stage being coupled to an input of the second catching stage.

5. The amplifier circuit as claimed in claim 4, wherein the amplifier comprises a differential pair of input transistors and further includes a shorting switch connected to couple together a pair of outputs of the differential pair during a portion of the at least one time interval.

6. The amplifier circuit as claimed in claim 1, wherein the first stage of the main amplifier includes a differential pair of input transistors having a pair of control electrodes coupled to a pair of complementary input nodes of the first input, and the amplifier circuit further comprises a shorting switch switchably coupled between a pair of outputs of the differential pair of input transistors to selectively electrically short the pair of outputs of the differential pair.

7. An amplifier circuit, comprising:

an input lead to receive an input signal;

a main amplifier including;

a first stage having a first input coupled to the input lead to receive the input signal, and a first output to provide a first stage output signal, and

a second stage having a second input switchably coupled to the first output to receive the first stage output signal, and a second output to provide an output signal to an output lead of the amplifier circuit; and

a catching amplifier switchably coupled to the output lead of the amplifier circuit to selectively configure the amplifier circuit to have a gain of approximately zero between the input lead and the output lead.

8. The amplifier circuit as claimed in claim 7, wherein the main amplifier is arranged such that the first output is uncoupled from the second input during at least a portion of at least one time interval during which the catching amplifier is coupled to the output lead.

9. An amplifier circuit, comprising:

an input lead to receive an input signal;

a main amplifier including;

a first stage having a first input coupled to the input lead to receive the input signal, and a first output to provide a first stage output signal, and

a second stage having a second input switchably coupled to the first output to receive the first stage output signal, and a second output to provide an output signal to an output lead of the amplifier circuit;

a catching amplifier switchably coupled to the main amplifier to selectively configure amplifier circuit to have a gain of approximately zero between the input lead and the output lead; and

a muting mechanism coupled to the main amplifier to selectively configure the amplifier circuit to have a gain of approximately zero between the input lead and the output lead.

10. An amplifier circuit, comprising:

an input lead to receive an input signal;

a main amplifier including;

a main input coupled to the input lead to receive the input signal, and

a main output switchably coupled to an output lead of the amplifier circuit to selectively provide an output signal to the output lead; and

a catching amplifier switchably coupled to the output lead of the amplifier circuit to selectively configure the amplifier circuit to have a gain of approximately zero between the input lead and the output lead.

11. The amplifier circuit as claimed in claim 10, wherein an output of the catching amplifier is switchably coupled to the output lead via a catching switch, and the main output is switchably coupled to the output lead via an uncoupling switch.

12. The amplifier circuit as claimed in claim 10, wherein the catching amplifier includes a non-inverting input and an inverting input, an output of the catching amplifier is connected to the inverting input, and the non-inverting input is connected to a constant voltage circuit node.

13. The amplifier circuit as claimed in claim 10, wherein the catching amplifier is substantially smaller than the main amplifier.

14. The amplifier circuit as claimed in claim 10, wherein the main amplifier includes a differential pair of input transistors having a pair of control electrodes coupled to a pair of complementary input nodes of the main input, and the amplifier circuit further comprises a shorting switch switchably coupled between a pair of outputs of the differential pair of input transistors to selectively electrically short the pair of outputs of the differential pair.

15. The amplifier circuit as claimed in claim 10, wherein the main amplifier is arranged such that the main output is uncoupled from the output lead during at least a portion of at least one time interval during which the catching amplifier is coupled to the output lead.

16. An amplifier circuit, comprising:

an input lead to receive an input signal;

a main amplifier including;

a main input coupled to the input lead to receive the input signal, and

a main output switchably coupled to an output lead of the amplifier circuit to selectively provide an output signal to the output lead;

a catching amplifier switchably coupled to the main amplifier to selectively configure the amplifier circuit to have a gain of approximately zero between the input lead and the output lead; and

a muting mechanism coupled to the main amplifier to selectively configure the amplifier circuit to have a gain of approximately zero between the input lead and the output lead.

17. A method for uncoupling an inter-stage output of an amplifier stage of a main amplifier from an inter-stage circuit node to which the inter-stage output is coupled while maintaining a relatively constant output signal at an output node of an amplifier circuit including the main amplifier, comprising the steps of:

configuring the amplifier circuit to have a gain of approximately zero between an input of the amplifier circuit and the output node of the amplifier circuit;

coupling at least one circuit node of a catching amplifier to at least one of the inter-stage circuit node and the output node of the amplifier circuit, the catching amplifier being configured to provide a gain of approximately zero between the input of the amplifier circuit and the output node of the amplifier circuit; and

uncoupling the inter-stage output of the amplifier stage of the main amplifier from the inter-stage circuit node.

18. The method of claim 17, wherein the step of coupling the at least one circuit node of the catching amplifier to at least one of the inter-stage circuit node and the output node of the circuit includes coupling an inter-stage output of an amplifier stage of the catching amplifier to the inter-stage circuit node.

19. The method of claim 18, further comprising the step of coupling an output of the catching amplifier to the output of the main amplifier after performing the step of configuring the amplifier circuit to have a gain of approximately zero between the input of the amplifier circuit and the output node of the amplifier circuit.

20. A method for coupling an inter-stage output of an amplifier stage of a main amplifier to an inter-stage circuit node while maintaining a relatively constant output signal at an output node of an amplifier circuit including the main amplifier, comprising the steps of:

configuring the amplifier circuit to have a gain of approximately zero between an input of the amplifier circuit and the output node of the amplifier circuit;

coupling the inter-stage output of the amplifier stage of the main amplifier to the inter-stage circuit node; and

uncoupling a circuit node of a catching amplifier, which is configured to provide a gain of approximately zero between the input of the amplifier circuit and the output node of the amplifier circuit, from the inter-stage circuit node.

21. The method of claim 20, further comprising the step of electrically shorting a pair of outputs of a differential pair of input transistors of the amplifier stage, which step is performed prior to performing the step of uncoupling the circuit node of the catching amplifier from the inter-stage circuit node.

22. The method of claim 20, further comprising the step of uncoupling an output of the catching amplifier from the output of the main amplifier after performing the step of coupling the inter-stage output of the amplifier stage of the main amplifier to the inter-stage circuit node.

23. A method for uncoupling an output of a main amplifier from an output node of a circuit while maintaining a relatively constant signal at the output node of the circuit, comprising the steps of:

configuring the circuit to have a gain of approximately zero between an input of the circuit and the output node of the circuit;

coupling an output of a catching amplifier, which is configured to provide a gain of approximately zero between the input of the circuit and the output node of the circuit, to the output node of the circuit; and

uncoupling the output of the main amplifier from the output node of the circuit.

24. A method for coupling an output of a main amplifier to an output node of a circuit while maintaining a relatively constant output signal at the output node of the circuit, comprising the steps of:

configuring the circuit to have a gain of approximately zero between an input of the circuit and the output node of the circuit;

coupling the output of the main amplifier to the output node of the circuit; and

uncoupling an output of a catching amplifier, which is configured to provide a gain of approximately zero between the input of the circuit and the output node of the circuit, from the output node of the circuit.

25. The method of claim 24, further comprising the step of electrically shorting a pair of outputs of a differential pair of input transistors of the main amplifier, which step is performed prior to performing the step of uncoupling the circuit node of the catching amplifier from the output node of the circuit.