Aim switching system and path changing method

• US 5,764,624 A
• Filed: 02/28/1996
• Issued: 06/09/1998
• Est. Priority Date: 03/06/1995
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Endo, Noboru, Takano, Masataka
• Primary Examiner(s): Safourek, Benedict V.
• Application Number:
  US08/608,561
• Time in Patent Office: 832 Days
• Field of Search: 370/217, 370/218, 370/389, 370/392, 370/395, 370/397, 370/413
• US Class Current: 370/218
• CPC Class Codes: H04L 2012/5619 Network Node Interface, e.g. tandem connections, transit switching
• CPC Class Codes: H04L 2012/5627 Fault tolerance and recovery
• CPC Class Codes: H04L 49/253 using establishment or release of connections between ports
• CPC Class Codes: H04L 49/30 Peripheral units, e.g. input or output ports
• CPC Class Codes: H04L 49/3009 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/3081 ATM peripheral units, e.g. policing, insertion or extraction
• CPC Class Codes: H04L 49/555 Error detection
• CPC Class Codes: H04L 49/557 Error correction, e.g. fault recovery or fault tolerance

Abstract

An ATM switching system at each node of a network performs route changing or rerouting promptly when a failure occurs. In each of ATM switching systems at nodes N1 to N6: a route table 21 of a line interface 102 is set with conversion header information of a normal route, and an alternate routing table 25 is set with header information of one or more alternate routes. Subsequently, each line interface tests, when a packet arrives, whether or not a failure has occurred in an output line involved in the normal route, by referring to a bitmap 264 storing failure lines and a VP failures. The line interface executes header conversion by applying the normal header information stored in the routing table 21 in the case of no failure set for the normal route and by applying the header information stored in the alternate routing table 25 in case a failure has occurred on the normal route, and then outputs the packet to an ATM switch 101. Since the alternate route is promptly selected at the time of a failure of a net line and not in response to decoding a header of a received packet, the number of packets discarded due to the failure is reduced, and the rerouting operation is promptly executed even in the case of multiple failures.

Claims

1. An asynchronous transfer mode (ATM) packet switching system, including:

a packet switch having a plurality of input/output lines, and being operable to form connections between said input and output lines so that an input packet received from an input line is routed to at least one output line according to a packet header content;

a storage for each connection, having a plurality of header information corresponding to an output line for a normal time and an output line for a failure time, respectively;

a selector, for each input packet, selecting and reading out at least one header information stored in said storage in accordance with the presence or absence of a failure on the output line for a normal time;

a header conversion unit for converting the content of the header portion of said input packet on the basis of the header information selected and read out by said selector; and

said packet switch forming a connection to output the output packet to the output line corresponding to the header portion of the output packet.

2. A switching system as set forth in claim 1, further comprising a line interface for each of said input/output lines and each line interface including said storage, said selector and said header conversion unit.

3. A switching system as set forth in claim 1,

wherein said header information includes an output connection information valid on said output line and an output line information for specifying said output line,

wherein said header conversion unit replaces the output connection information contained in the header portion of each input packet by the output connection information indicated by the header information selected by said selector, and thereafter outputs the output packet to said switch.

4. A switching system as set forth in claim 1,

wherein said storage includes:

a first table storing first header information for sending the input packet to a normal output line, and a second table storing second header information for sending the input packet to an alternate output line; and

wherein said selector includes;

status storage storing status information including presence or absence of a failure on a plurality of the output lines, and reading out the first header information corresponding to a connection identifying information contained in the header portion of the input packet, from said first table; and

select control means for deciding a status of the first output line specified by the first header information read out from said first table means, by a failure status information stored in said status storage, to feed said first header information to said header conversion unit when the first output line is normal, and to read out and feed the second header information specified by the combination of the connection identifying information of the input packet and the failure status of the output line to said header conversion unit when a failure occurs on said first output line.

5. A switching system as set forth in claim 4,

wherein said selector includes a table address generator outputting a table address corresponding to the combination of the connection identification information of the input packet and the failure status of the output line, so that said second header information is read out from said second table on the basis of the table address output by said address generating means.

6. A switching system as set forth in claim 4:

wherein the header information stored in said first and second tables are an output connection information and an output line information for specifying the output line;

wherein said selector feeds said header conversion unit with the output connection information read out from said first or second table, and feeds said switch with said output line information;

wherein said header conversion unit replaces the connection information contained in the header portion of the input packet, by the output connection information fed from said selector, and supplies the output connection information to said switch; and

wherein said switch transfers each output packet input from said header conversion unit to the output line specified by the output line information input from said selector.

7. A switching system as set forth in claim 4,

wherein said status storage stores whether or not a physical failure occurs on each output line and whether or not a failure occurs on each output line for each of multiple connections.

8. A switching system as set forth in claim 1,

wherein said storage stores said header information in a manner to correspond to a plurality of output lines to output packets at a normal time for any connection so that the input packets of said connection may be multicast to a plurality of output lines.

9. An asynchronous transfer mode (ATM) packet switching system comprising:

a switch having a plurality of input and output ports to be connected to input/output lines;

a plurality of line interfaces connected between said input and output ports and the input/output lines;

a call controller connected with each of said line interfaces and said switch to control switch connection between said input and output ports, so that an input packet received from an input line is routed to at least one output port as determined according to content of a header portion of the packet;

each of said line interfaces including;

first header generating means for generating and storing first header information to route the input packet to the output port along a route designated in advance as a normal route in a manner to correspond to one of said connections, wherein said storing is completed prior to said line interface receiving the input packet;

second header generating means for generating and storing second header information to route the input packet to another output line along another route designated in advance as an alternate route in a manner to correspond to another of said connections, wherein said storing is completed prior to said line interface receiving the input packet; and

header conversion means for converting the header portion of each input packet to include the first header information when the output lines of the normal route are normal, and to include the second header information when there is a failure on the output line of said normal route; and

wherein said switch forms said one or another connection that transfers the input packet, received from the input line, to the output line corresponding to the header information applied by said header conversion means.

10. A switching system as set forth in claim 9, wherein said header conversion means includes status storage means for storing the presence or absence of a failure for each of the output lines, wherein said storing is completed prior to said line interface receiving the input packet so that the status of the output line specified by the first header information generated by said first header generating means is decided prior to receiving each input packet by the stored information of said status storage means.

11. A switching system as set forth in claim 9, wherein said header conversion means includes:

status storage means for storing the presence or absence of a failure on each of the output lines, wherein said storing is completed prior to said line interface receiving the input packet;

means for deciding status of the first output line specified by the first header information generated by said first header generating means, by the stored information of said status storage means;

means for feeding said second header generating means with connection identification information of each input packet and address information as determined by the status of the output line; and

wherein said header conversion means selects some of said first header information and said second header information according to said address information.

12. A switching system as set forth in claim 9, wherein said header conversion means includes:

status storage means for storing the presence or absence of a failure on each of the output lines, wherein said storing is completed prior to said line interface receiving the input packet;

means for deciding status of the first output line specified by the first header information generated by said first header generating means, by the stored information of said status storage means;

means for feeding said second header generating means with connection identification information of each input packet and address information as determined by the status of the output line; and

wherein said header conversion means selects some of said first header information and said second header information according to said address information.

13. An output path changing method performed in an asynchronous transfer mode (ATM) of a packet switching system forming connections between a plurality of input and output lines, comprising the steps of:

at a connection setting time, designating one route with one output line as a normal route and at least another route with another output line as an alternate route and storing of a plurality of header information to be applied to header conversion of input packets in a manner to correspond to said normal route and alternate route;

thereafter, each time an input packet is received from one of the input lines, retrieving from storage the header information corresponding to the normal route or alternate route selectively and using retrieved header information for the header conversion of the input packet in response to presence or absence of a failure on the output lines of the normal route; and

outputting the input packet through the switch to the output line corresponding to the header information applied by said header conversion.

14. A path changing method as set forth in claim 13, wherein said storing of header information is in a line interface connected with each input and output line.

15. A path changing method as set forth in claim 14, further comprising:

updating storage of output line status when a failure occurs on any output line and when an output line recovers from the failure, in each line interface; and

each time the input packet is received in the interface, determining the presence or absence of a failure on the output line of a normal route to output said input packet on the basis of the storage of output line status and on the basis of said deciding, selecting the header information corresponding to the output line designated as the alternate route and effecting the header conversion of the input packet when a failure status is decided as to the output line of the normal route.

16. A path changing method as set forth in claim 13, wherein said designating and storing, for at least one connection, stores a plurality of output lines to act as multiple alternate routes to be used in said step of retrieving in a predetermined order based in the event of multiple failures.

17. A path changing method as set forth in claim 13, wherein said designating and storing, for at least one connection of packet multicasting, stores a plurality of output lines to act as multiple normal routes, and a plurality of output lines to act as multiple alternate routes.

18. An ATM layer process or to be inserted into input line of an asynchronous transfer mode (ATM) node system having a plurality of input/output lines, comprising:

first header generating means for generating and storing first header information to be applied to a normal header conversion in a manner to correspond to a connection to a normal output line, wherein said storing is completed prior to said line interface receiving the input packet;

second header generating means for generating and storing second header information to be applied to a header conversion when a failure occurs on an output line, in a manner to correspond to an alternate connection, wherein said storing is completed prior to said line interface receiving the input packet; and

header conversion means for converting the header portions of individual input packets selectively in a manner to correspond to the input packet received from the input line, by applying the first header information generated by said first header generating means when the normal output line is normal, and by applying the second header information generated by said second header generating means when a failure occurs on the normal output line.

19. An ATM layer processor according to claim 18, wherein said header conversion means includes status storage means for storing the presence or absence of a failure for each output line of said node system as a failure status, and means for determining failure status of the normal output line specified by said first header information for each input packet by stored information of said status storage means;

and

said header conversion means selecting one of said first header information and said second header information in response to said determining.

20. An ATM layer processor according to claim 19, wherein said header conversion means further includes means for feeding said header conversion means with the one of the first header information and second header information comprising connection identification information and address information determined by the failure status of the normal output line.

21. An ATM layer processor according to claim 20, wherein said status storage means stores the presence or absence of a failure of each output line in terms of a bitmap having indication bits corresponding to the output lines, and wherein said means for determining decides the failure status of the normal output line in terms of said bitmap.

22. An ATM layer processor according to claim 21, wherein said status storage means determines and stores said bitmap depending upon the failure status of a physical packet connection route of each output line and failure of a virtual route.