Method and apparatus for extending a local PCI bus to a remote I/O backplane
First Claim
Patent Images
1. A method of extending one or more local buses to a remote I/O backplane comprising the steps of:
- receiving a message from a local bus;
generating a serial request packet from the local bus message when the local bus message is targeted to the remote I/O backplane;
transmitting the serial request packet to the remote I/O backplane over a serial link;
receiving a serial response packet from the remote I/O backplane when specified by the serial request packet over the serial link, said serial response packet defining a local bus operation; and
performing the local bus operation indicated by the serial response packet.
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Accused Products
Abstract
A method and apparatus for extending a PCI bus interface to a remote I/O backplane through a high speed serial link, providing a large number of I/O slots to alleviate packaging requirements. The apparatus includes a local and a remote serial bridge coupled by a serial link, which is used to transceive messages. Each serial bridge may reside either on a PCI add-in card, or directly on a motherboard. The bridge uses data buffering and a handshaking request and acknowledge protocol to assure accurate and timely data transfer.
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Citations
65 Claims
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1. A method of extending one or more local buses to a remote I/O backplane comprising the steps of:
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receiving a message from a local bus; generating a serial request packet from the local bus message when the local bus message is targeted to the remote I/O backplane; transmitting the serial request packet to the remote I/O backplane over a serial link; receiving a serial response packet from the remote I/O backplane when specified by the serial request packet over the serial link, said serial response packet defining a local bus operation; and performing the local bus operation indicated by the serial response packet. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A method of extending one or more local buses to a remote I/O backplane, comprising the steps of:
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receiving a serial request packet defining a local bus operation from the remote I/O backplane over a serial link; performing the local bus operation; and transmitting a serial response packet to the remote I/O backplane. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A method of extending one or more local buses in a processor to a remote I/O backplane having one or more backplane buses, comprising the steps of:
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receiving a message from a backplane bus; generating a serial request packet from the backplane bus message when the backplane bus message is targeted to a local bus; transmitting the serial request packet to the local bus over a serial link; receiving a serial response packet from the local bus when specified by the serial request packet over the serial link, said serial response packet defining a backplane bus operation; and performing the remote bus operation indicated by the serial response packet. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42)
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43. A method of extending one or more local buses in a processor to a remote I/O backplane having one or more backplane buses, comprising the steps of:
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receiving a serial request packet defining a remote bus operation from the processor over a serial link; performing the backplane bus operation; and transmitting a serial response packet to the processor over the serial link. - View Dependent Claims (44, 45, 46, 47, 48, 49, 50, 51, 52)
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53. An apparatus for extending a processor comprising a PCI bus to a remote I/O backplane over a serial link, comprising:
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a PCI bus interface processor coupled to the PCI bus, a serial link processor for translating bus messages into serial link interface messages and translating serial link interface messages into a bus message, said serial link processor comprising; means for determining the destination of the bus message, said determining means coupled to the PCI bus interface; means for generating a serial request packet from the bus message, coupled to the determining means; and means for performing the bus operation defined by the serial response packet; and a serial link interface, coupled to the serial link processor and the serial link, said serial link interface comprising; a transmitter for transmitting a serial request packet and a serial response acknowledge packet over the serial link, the transmitting means coupled to the serial link; and a receiver for receiving a serial request acknowledge packet and a serial response packet over the serial link, the receiving means coupled to the serial link. - View Dependent Claims (54, 55, 56, 57, 58, 59)
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60. An apparatus for extending a processor comprising a PCI bus to a remote I/O backplane over a serial link, comprising:
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a PCI bus interface processor coupled to the PCI bus; a serial link processor for translating bus messages into serial link interface messages and translating serial link interface messages into a bus message; a serial link interface, coupled to the serial link processor and the serial link; and
an ICC bus interface coupled to the bus.
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61. An apparatus for extending a processor comprising a PCI bus to a remote I/O backplane over a serial link, comprising;
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a PCI bus interface processor coupled to the PCI bus; a serial link processor for translating bus messages into serial link interface messages and translating serial link interface messages into a bus message;
said serial link processor comprising;a decoder for interpreting the serial request packet to determine if a bus operation is required; and means for performing the bus operation defined by the serial request packet; and a serial link interface, coupled to the serial link processor and the serial link;
said serial link interface comprising;a transmitter for transmitting a serial response acknowledge packet and a serial request acknowledge packet over the serial link, coupled to the serial link; and a receiver for receiving a serial response acknowledge packet over the serial link, coupled to the serial link. - View Dependent Claims (62)
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63. An apparatus for extending a processor comprising a PCI and an ICC bus to a remote I/O backplane over a serial link, comprising:
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a PCI bus interface processor coupled to the PCI bus; a serial link processor for translating bus messages into serial link interface messages and translating serial link interface messages into a bus message; a serial link interface, coupled to the serial link processor and the serial link; and an ICC interface processor, coupled to the serial link processor and the ICC bus.
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64. An apparatus for extending a processor comprising a PCI bus and a JTAG bus to a remote I/O backplane over a serial link, comprising:
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a PCI bus interface processor coupled to the PCI bus; a serial link processor for translating bus messages into serial link interface messages and translating serial link interface messages into a bus message; a serial link interface, coupled to the serial link processor and the serial link; and a JTAG bus interface processor coupled to the JTAG bus and the serial interface processor.
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65. An apparatus for extending a processor comprising a PCI bus and a sideband signal bus to a remote I/O backplane over a serial link, comprising:
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a PCI bus interface processor coupled to the PCI bus; a serial link processor for translating bus messages into serial link interface messages and translating serial link interface messages into a bus message; a serial link interface, coupled to the serial link processor and the serial link; and a sideband interface, coupled to the sideband signal bus and the PCI interface processor.
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Specification