Solder bump fabrication methods and structure including a titanium barrier layer

• US 5,767,010 A
• Filed: 11/05/1996
• Issued: 06/16/1998
• Est. Priority Date: 03/20/1995
• Status: Expired due to Term

• Current Assignee: Amkor Technology Singapore Holding Pte., Ltd. (Amkor Technology Incorporated)
• Original Assignee: MCNC, Inc.
• Inventors: Kellam, Mark D., Mis, Joseph Daniel, Adema, Gretchen Maerker, Rogers, W. Boyd
• Primary Examiner(s): PICARDAT, KEVIN M
• Application Number:
  US08/744,122
• Time in Patent Office: 588 Days
• Field of Search: 437/183, 437/189, 437/190, 437/192, 437/194, 437/195, 437/200, 438/612, 438/613, 438/614
• US Class Current: 438/614
• CPC Class Codes: H01L 21/2885 using an external electrical current, i.e. electro-deposition
• CPC Class Codes: H01L 2224/0361 Physical or chemical etching
• CPC Class Codes: H01L 2224/03912 the bump being used as a mask for patterning the bonding area
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05027 the internal layer extending out of an opening
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05171 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05666 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/10145 Flow barriers
• CPC Class Codes: H01L 2224/11001 Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
• CPC Class Codes: H01L 2224/11462 Electroplating
• CPC Class Codes: H01L 2224/11472 Profile of the lift-off mask
• CPC Class Codes: H01L 2224/11474 Multilayer masks
• CPC Class Codes: H01L 2224/11849 Reflowing
• CPC Class Codes: H01L 2224/13116 Lead [Pb] as principal constituent
• CPC Class Codes: H01L 2224/29099 Material
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/05042 : Si3N4
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/14 : Integrated circuits

Abstract

A method for fabricating solder bumps on a microelectronic device having contact pads includes the steps of depositing a titanium barrier layer on the device, forming an under bump metallurgy layer on the titanium barrier layer, and forming one or more solder bumps on the under bump metallurgy layer. The solder bump or bumps define exposed portions of the under bump metallurgy layer which are removed, and then the exposed portion of the titanium barrier layer is removed. The titanium barrier layer protects the underlying microelectronic device from the etchants used to remove the under bump metallurgy layer. The titanium layer also prevents the under bump metallurgy layer from forming a residue on the underlying microelectronic device. Accordingly, the titanium barrier layer allows the under bump metallurgy layer to be quickly removed without leaving residual matter thereby reducing the possibility of electrical shorts between solder bumps.

Claims

1. A method for forming solder bumps on a microelectronic device having a substrate and a contact pad on said substrate, wherein said contact pad has an exposed surface portion, said method comprising the steps of:

forming a titanium barrier layer on said contact pad, wherein said barrier layer covers said exposed surface portion of said contact pad and extends over said substrate;

forming an under bump metallurgy layer on said barrier layer opposite said substrate, said under bump metallurgy layer comprising a chromium layer on said barrier layer, a phased layer of chromium and copper on said chromium layer opposite said barrier layer, and a copper layer on said phased layer opposite said chromium layer;

forming a solder bump on said under bump metallurgy layer opposite said exposed surface portion of said contact pad and opposite said titanium barrier layer thereby defining exposed and unexposed portions of said under bump metallurgy layer;

applying a chemical etchant to said exposed portions of said under bump metallurgy layer wherein said chemical etchant attacks said under bump metallurgy layer preferentially with respect to said solder bump and said titanium barrier layer thereby defining an exposed portion of said titanium barrier layer; and

applying a titanium etchant to said exposed portion of said titanium barrier layer wherein said titanium etchant selectively attacks said titanium barrier layer preferentially with respect to said solder bump, said copper layer, said phased layer, and said chromium layer.

2. A method according to claim 1 wherein said contact pad comprises a titanium contact pad.

3. A method according to claim 1 wherein said titanium etchant comprises hydrofluoric acid buffered with ammonium fluoride.

4. A method according to claim 1 wherein said step of applying a chemical etchant further comprises the steps of:

applying a copper etchant to said exposed portion of said copper layer wherein said copper etchant selectively attacks said copper layer and said copper portion of said phased layer preferentially with respect to said solder bump, said chromium layer, and said titanium barrier layer; and

applying a chromium etchant to said chromium portion of said phased layer and said chromium layer wherein said chromium etchant selectively attacks said chromium portion of said phased layer and said chromium layer preferentially with respect to said solder bump, said copper layer, and said titanium barrier layer.

5. A method according to claim 4 wherein said copper etchant comprises a mixture of ammonium hydroxide and hydrogen peroxide, and wherein said chromium etchant comprises a mixture of hydrochloric acid and water.

6. A method according to claim 1 wherein said step of forming a solder bump is preceded by the step of forming a solder dam layer including a solder non-wettable layer on said exposed portions of said under bump metallurgy layer, and wherein said step of applying a chemical etchant is preceded by the step of removing said solder dam layer.

7. A method according to claim 6 wherein said step of forming a solder dam layer comprises the step of forming a solder non-wettable layer selected from the group consisting of a titanium layer and a chromium layer.

8. A method according to claim 6 wherein said step of forming a solder dam layer further comprises the step of forming a solder wettable layer on said solder non-wettable layer opposite said under bump metallurgy layer.

9. A method according to claim 6 wherein said step of forming a solder bump comprises the steps of:

forming a patterned mask layer on said solder dam layer;

electroplating solder on said unexposed portion of said under bump metallurgy layer; and

selectively removing said patterned mask layer.

10. A method according to claim 1 wherein said step of forming a solder bump is followed by the step of reflowing said solder bump.

11. A method according to claim 10 wherein said step of reflowing said solder bump results in a reaction between said solder bump and said unexposed portion of said under bump metallurgy layer to form an intermetallic region, and wherein said chemical etchant preferentially attacks said under bump metallurgy layer with respect to said intermetallic region.

12. A method for forming solder bumps on a microelectronic device having a substrate and a contact pad on said substrate, wherein said contact pad has an exposed surface portion, said method comprising the steps of:

forming a titanium barrier layer on said contact pad, wherein said barrier layer covers said exposed surface portion of said contact pad and extends over said substrate;

forming an under-bump metallurgy layer on said barrier layer opposite said substrate, wherein said under-bump metallurgy layer includes a chromium layer;

forming a solder bump on said under-bump metallurgy layer opposite said exposed surface portion of said contact pad and said barrier layer thereby defining exposed and unexposed surface portions of said under-bump metallurgy layer;

selectively removing said exposed portion of said under-bump metallurgy layer thereby defining an exposed portion of said barrier layer; and

selectively removing said exposed portion of said barrier layer.

13. A method according to claim 12 wherein said contact pad comprises a titanium contact pad.

14. A method according to claim 12 wherein said step of selectively removing said exposed portion of said under bump metallurgy layer comprises the step of applying a chemical etchant to said under bump metallurgy layer wherein said chemical etchant attacks said under bump metallurgy layer preferentially with respect to said barrier layer and said solder bump.

15. A method according to claim 12 wherein said step of selectively removing said exposed portion of said titanium barrier layer comprises the step of applying a titanium etchant to said barrier layer wherein said titanium etchant attacks said barrier layer preferentially with respect to said solder bump and said under bump metallurgy layer.

16. A method according to claim 12 wherein said step of forming an under bump metallurgy layer comprises the steps of:

forming a chromium layer on said barrier layer;

forming a phased layer of chromium and copper on said chromium layer opposite said barrier layer; and

forming a copper layer on said phased layer opposite said chromium layer.

17. A method according to claim 16 wherein said step of selectively removing said exposed portion of said under bump metallurgy layer further comprises the steps of:

applying a copper etchant to said exposed portion of said copper layer wherein said copper etchant selectively attacks said copper layer and said copper portion of said phased layer preferentially with respect to said solder bump, said chromium layer, and said titanium barrier layer; and

applying a chromium etchant to said chromium portion of said phased layer and said chromium layer wherein said chromium etchant selectively attacks said chromium portion of said phased layer and said chromium layer preferentially with respect to said solder bump, said copper layer, and said titanium barrier layer.

18. A method according to claim 12 wherein said step of forming a solder bump is preceded by the step of forming a solder dam layer including a solder non-wettable layer on said exposed portions of said under bump metallurgy layer, and wherein said step of selectively removing said exposed portion of said under bump metallurgy layer is preceded by the step of removing said solder dam layer.

19. A method according to claim 18 wherein said step of forming a solder dam layer comprises the step of forming a solder non-wettable layer selected from the group consisting of a titanium layer and a chromium layer.

20. A method according to claim 18 wherein said step of forming a solder dam layer further comprises the step of forming a solder wettable layer on said solder non-wettable layer opposite said under bump metallurgy layer.

21. A method according to claim 18 wherein said step of forming a solder bump comprises the steps of:

forming a patterned mask layer on said solder dam layer;

electroplating solder on said unexposed portion of said under bump metallurgy layer; and

selectively removing said patterned mask layer.

22. A method according to claim 12 wherein said step of forming a solder bump is followed by the step of reflowing said solder bump.

23. A method according to claim 22 wherein said step of reflowing said solder bump results in a reaction between said solder bump and said unexposed portion of said under bump metallurgy layer to form an intermetallic region.

24. A method for forming solder bumps on a microelectronic device having a substrate and a contact pad on said substrate, wherein said contact pad has an exposed surface portion, said method comprising the steps of:

forming an under bump metallurgy layer on said contact pad, wherein said under bump metallurgy layer covers said exposed surface portion of said contact pad and extends over said substrate;

forming a solder dam on portions of said under bump metallurgy layer, said solder dam defining an uncovered portion of said under bump metallurgy layer opposite said exposed surface portion of said contact pad, said solder dam comprising a solder non-wettable layer on said under bump metallurgy layer and a solder wettable layer on said solder non-wettable layer opposite said under bump metallurgy layer; and

forming a solder bump on said uncovered portion of said under bump metallurgy layer opposite said exposed surface portion of said contact pad thereby defining exposed and unexposed surface portions of said under bump metallurgy layer, said solder bump extending onto a portion of said solder dam thereby defining exposed and unexposed portions of said wettable layer.

25. A method according to claim 24 further comprising the steps of:

selectively removing said exposed portion of said solder wettable layer; and

reflowing said solder bump thereby dissolving said unexposed portion of said solder wettable layer into said solder bump, said reflowed solder bump including said dissolved solder wettable layer and forming a solder ball on said unexposed portion of said under bump metallurgy layer.

26. A method according to claim 25 wherein said reflowing step results in a reaction between said solder bump and said exposed portion of said under bump metallurgy thereby forming an intermetallic region.

27. A method according to claim 24 wherein said solder wettable layer comprises copper.

28. A method according to claim 24 wherein said solder non-wettable layer comprises chromium.

29. A method according to claim 24 wherein said contact pad comprises a titanium contact pad.

30. A method according to claim 24 wherein the step of forming an under bump metallurgy layer is preceded by the step of forming a titanium barrier layer on said contact pad, wherein said titanium barrier layer covers said exposed surface portion of said contact pad and extends over said substrate.

31. A method according to claim 30 further comprising the steps of:

selectively removing said exposed portion of said solder dam and said under bump metallurgy layer thereby defining an exposed portion of said barrier layer; and

selectively removing said exposed portion of said barrier layer.

32. A method according to claim 31 wherein said step of selectively removing said exposed portion of said under bump metallurgy layer comprises the step of applying a chemical etchant to said under bump metallurgy layer wherein said chemical etchant attacks said under bump metallurgy layer preferentially with respect to said barrier layer and said solder bump.

33. A method according to claim 31 wherein said step of selectively removing said exposed portion of said titanium barrier layer comprises the step of applying a titanium etchant to said barrier layer wherein said titanium etchant attacks said barrier layer preferentially with respect to said solder bump and said under bump metallurgy layer.

34. A method according to claim 30 wherein said step of forming an under bump metallurgy layer comprises the steps of:

forming a chromium layer on said barrier layer;

forming a phased layer of chromium and copper on said chromium layer opposite said barrier layer; and

forming a copper layer on said phased layer opposite said chromium layer.

35. A method according to claim 24 wherein said step of forming a solder bump comprises the steps of:

forming a patterned mask layer on said solder dam layer;

electroplating solder on said unexposed portion of said under bump metallurgy layer; and

selectively removing said patterned mask layer.