Apparatus and method for detecting motor position in PWM operation of a polyphase DC motor
First Claim
1. Circuitry for driving a polyphase load, the circuitry comprising:
- a power stage having a plurality of output terminals for connection with respective phases of the load;
signal sequencing and interfacing apparatus connected to deliver sequentially commutated input signals to the power stage;
timing apparatus connected with the signal apparatus and comprising a first circuit portion arranged to monitor a load feedback signal to detect an occurrence of a predetermined value, a second circuit portion arranged to determine a time interval between specified occurrences of the predetermined value of the load feedback signal, and a third circuit portion arranged to detect when a present interval between specified occurrences of the predetermined value of the load feedback signal is at a set time prior to a next expected occurrence of the predetermined value according to the prior time interval determined by the second circuit portion and to cause a timing control signal to go to the signal apparatus at said set time.
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Abstract
A pulse width modulated (PWM) motor drive with back EMF monitoring of the floating phase of a polyphase motor is arranged so that zero crossings of the back EMF can be read without interference by PWM switching. A measure is taken of an interval between two zero crossings and, in the next interval, the PWM switching is stopped near to and before the next expected zero crossing, based on the time of the last prior interval. A period counter counts up during the first interval and another counter, loaded with the previous count reached by the period counter, counts down at the same rate during the second interval until a certain number is reached, near to but before zero, to generate a signal that results in stopping PWM switching until after the next zero crossing is detected.
74 Citations
31 Claims
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1. Circuitry for driving a polyphase load, the circuitry comprising:
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a power stage having a plurality of output terminals for connection with respective phases of the load; signal sequencing and interfacing apparatus connected to deliver sequentially commutated input signals to the power stage; timing apparatus connected with the signal apparatus and comprising a first circuit portion arranged to monitor a load feedback signal to detect an occurrence of a predetermined value, a second circuit portion arranged to determine a time interval between specified occurrences of the predetermined value of the load feedback signal, and a third circuit portion arranged to detect when a present interval between specified occurrences of the predetermined value of the load feedback signal is at a set time prior to a next expected occurrence of the predetermined value according to the prior time interval determined by the second circuit portion and to cause a timing control signal to go to the signal apparatus at said set time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. In timing control circuitry of a driver for a polyphase DC motor operated in a pulse width modulation (PWM mode, the combination comprising:
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a zero crossing detector connected to receive an input signal related to a waveform of back EMF from a floating phase of the motor and to generate an output pulse upon occurrence of zero crossings of the input signal; a period counter counting up between occurrences of zero crossings and then resetting; a down counter, arranged to be loaded with a maximum count from the period counter, said down counter counting down to a predetermined count above zero at which a timing control signal is produced to ensure the driver is on, and not in a PWM off segment, when a next zero crossing occurs. - View Dependent Claims (10, 11)
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12. A circuit for maintaining capability of precise detection of signals indicating position of a motor rotor, for use in motor speed control, in a drive system of a polyphase motor that utilizes frequent on-off and off-on transitions of the drive to coils of respective phases of the motor, with resulting ability to achieve reduced power consumption compared to continuous operation, during the sequential energization of the polyphase coils, the circuit comprising:
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a back EMF monitor that receives a BEMF signal from the coils of each phase when it is floating during a period when other phases are energized; a reference voltage detector that determines when BEMF signals are at a predetermined reference voltage magnitude and generates crossing signals on selected occurrences of the predetermined reference voltage magnitude; timing apparatus that determines time intervals between the selected occurrences of the predetermined reference voltage magnitude and, after one of said time intervals between a first and a second selected occurrence, has capability to use a duration of said one time interval to time a control signal that forces the drive on, without an on-off transition, from a time before a next expected selected occurrence until after a third selected occurrence has actually been determined by the reference voltage detector. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A method of accurately detecting when a predetermined back EMF reference voltage crossing, such as a zero crossing, develops in a floating phase of a polyphase motor, despite normal operation of the motor with drive power applied by a drive system in a discontinuous, or nonlinear, mode, such as a PWM mode, so that the reference crossing signals are available for use for control functions in the drive system, comprising the steps of:
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measuring a period between a first set of the reference crossing signals; determining a pre-crossing time at a predetermined interval before the anticipated end of a second set of the reference crossing signals based on the prior measured period; stopping discontinuities in drive signals applied to the drive system so drive power is applied continuously from the pre-crossing time until a subsequent reference crossing signal to conclude the second set has actually occurred. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31)
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Specification