Voltage booster with an acceleration circuit

• US 5,768,115 A
• Filed: 05/14/1997
• Issued: 06/16/1998
• Est. Priority Date: 12/28/1993
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Inventors: Pascucci, Luigi, Golla, Carla Maria, Padoan, Silvia
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): Vu, Bao Q.
• Application Number:
  US08/855,922
• Time in Patent Office: 398 Days
• Field of Search: 363/59, 363/60, 363/61, 323/284, 307/110, 320/1
• US Class Current: 363/59
• CPC Class Codes: G11C 5/145 Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor G11C5/141 takes precedence
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps

Abstract

A voltage booster comprising a charge pump for generating a boost voltage over a boost line. The booster comprises a comparator which is supplied by a voltage divider with a voltage proportional to the boost voltage, and by a reference source with a low reference voltage, and which, depending on the outcome of the comparison, enables or disables the charge pump. A voltage limiter is connected between the boost line and ground; and a acceleration circuit accelerates the voltage increase on the acceleration line following low-power operation in which the paths toward ground are interrupted for reducing consumption.

Claims

1. A voltage booster coupled to a power supply and comprising:

a charge pump circuit having an output connected to a boost line presenting a boost voltage;

enabling means connected to said charge pump circuit and to said boost line for generating enabling and disabling signals for said charge pump circuit when the value of said boost voltage is respectively below and above predetermined limits, said enabling means including a comparing means for comparing a reference voltage with a voltage that is a function of said boost voltage; and

an acceleration circuit, including a transistor coupled between the power supply and said boost line, to couple said boost line to the power supply, via said transistor, for a predetermined period of time to thereby increase the speed with which said boost line presents said boost voltage.

2. A booster as claimed in claim 1 wherein said enabling means includes a reference source generating said reference voltage.

3. A booster as claimed in claim 1 wherein said enabling means includes a voltage divider connected to said boost line and having an intermediate tap terminal connected to said comparing means and providing a voltage whose value is related to said boost voltage.

4. A booster as claimed in claim 1 wherein said comparing means includes a differential amplifier.

5. A booster as claimed in claim 1 wherein said enabling means is interposed between a first and second reference potential line and includes first switch means having control inputs supplied with control signals indicating low-power operation, for interrupting the electrical continuity between said first and second reference potential lines upon receiving said control signals.

6. A booster as claimed in claim 5 wherein said comparing means includes:

a reference input;

an output;

first enabling pulse generating means for generating a first enabling pulse upon termination of said low-power operation;

first bias means having a first enabling input connected to said first enabling pulse generating means, and a first bias terminal connected to said output for momentarily biasing said output upon receiving said first enabling pulse; and

second bias means having a second enabling input connected to said first enabling pulse generating means, and a second bias terminal connected to said reference input for momentarily biasing said reference input upon receiving said first enabling pulse.

7. A booster as claimed in claim 6 which includes second enabling pulse generating means for generating a second enabling pulse upon termination of said low-power operation;

said acceleration circuit having an input connected to said second enabling pulse generating means, and an output connected to said boost line.

8. A booster as claimed in claim 7 wherein said acceleration circuit includes capacitive means having a first boost terminal connected to said second enabling pulse generating means, and a second boost terminal connected to a first reference voltage less than the power supply and to said boost line via second switch means and said transistor, said second switch means separating said second boost terminal from the power supply upon receiving said second enabling pulse, and said transistor connecting said boost line to said first reference voltage at least in low-power operating conditions, and connecting said boost line to the power supply in the presence of said second enabling pulse.

9. A booster as claimed in claim 1 which further comprises a voltage limiter interposed between said boost line and a second reference potential line.

10. A booster as claimed in claim 9 wherein said voltage limiter includes a plurality of diode elements connected in series with one another.

11. A booster as claimed in claim 10 wherein said voltage limiter includes a by-pass element having a control terminal and by-pass terminals connected to predetermined said diode elements;

said control terminal being connected to said charge pump circuit and being supplied with a pump operation signal so as to by-pass said predetermined diode elements upon receiving said pump operation signal.

12. A booster as claimed in claim 10 wherein said voltage limiter includes fourth switch means having a control input supplied with a control signal indicating low-power operation, for interrupting the electrical continuity between said boost line and said second reference potential line upon receiving said control signal.

13. A booster as claimed in claim 1, further comprising a steady state indicating circuit connected to said enabling means and generating a logic signal indicating a steady state value of said boost voltage.

14. A voltage booster circuit receiving a supply voltage and generating a boost voltage greater than the supply voltage, the voltage booster circuit comprising:

a charge pump for providing the boost voltage on an output line;

a feedback controller coupled to the charge pump and adapted to receive the boost voltage, the feedback controller providing a control signal as a function of the boost voltage, the charge pump being adapted to receive the control signal so that the boost voltage is a function of the control signal; and

an acceleration circuit to operatively couple the output line to the supply voltage to accelerate a transition of the output line to a voltage level within a predetermined threshold of the supply voltage.

15. The voltage booster circuit of claim 14, wherein the feedback controller includes:

a divider for providing a boost signal which is proportional to the boost voltage;

a reference source for providing a reference signal; and

a comparator for comparing the boost signal and the reference signal and providing the control signal as a function of the comparison.

16. The voltage booster circuit of claim 15, wherein the comparator is a differential amplifier, wherein the control signal enables the charge pump when the boost signal is less than the reference signal and disables the charge pump when the boost signal is greater than the reference signal.

17. The voltage booster circuit of claim 14, further comprising a limiter coupled to the charge pump and adapted to receive the boost voltage, the limiter restricting the boost voltage to a high limit voltage.

18. The voltage booster circuit of claim 17, wherein the charge pump is adapted to provide a low limit voltage selection signal when the charge pump is enabled, wherein the limiter is adapted to receive the low limit voltage selection signal and in response to restrict the boost voltage to a low limit voltage.

19. The voltage booster circuit of claim 14, further comprising:

a reset circuit coupled to the charge pump, the reset circuit for providing a reset signal which disables the charge pump in order to initiate a low power condition in the voltage booster circuit, the reset circuit also for providing an accelerate signal to activate said acceleration circuit.

20. A method of providing a boost voltage greater than a supply voltage, the method comprising:

providing a charge pump for outputting the boost voltage at an output line;

temporarily coupling the output line to the supply voltage to accelerate a transition of the output line to a voltage level within a predetermined threshold of the supply voltage;

generating a reference voltage;

generating a boost signal which is proportional to the boost voltage;

when the boost signal is less than the reference voltage, enabling the charge pump;

when the boost signal is more than the reference voltage, disabling the charge pump; and

outputting the boost voltage from the charge pump.

21. A memory system having a memory and a voltage booster circuit, the voltage booster circuit for providing a boost voltage greater than a supply voltage, the voltage booster circuit comprising:

a charge pump for providing the boost voltage;

a divider coupled to the charge pump and adapted to receive the boost voltage, the divider for providing a boost signal which is proportional to the boost voltage;

a reference source for providing a reference signal;

a comparator coupled to the charge pump, the reference source and the divider and adapted to receive the reference signal and the boost signal, the comparator for comparing the boost signal and the reference signal and providing a control signal as a function of the comparison, wherein the charge pump is adapted to receive the control signal so that the boost voltage is a function of the control signal;

a limiter coupled to the charge pump and adapted to receive the boost voltage, the limiter for restricting the boost voltage to a limit voltage;

a reset circuit coupled to the charge pump to provide a reset signal which disables the charge pump in order to initiate a low power condition in the voltage booster circuit, the reset circuit also for providing an accelerate signal; and

an acceleration circuit coupled to the reset circuit and the charge pump and adapted to receive the accelerate signal, the acceleration circuit temporarily setting the boost voltage equal to the supply voltage in order to initiate a normal condition in the voltage booster circuit.

22. A voltage booster circuit that outputs a boost voltage greater than a supply voltage, the voltage booster circuit comprising:

a charge pump, having an active mode and a standby mode, and receiving a control signal and providing the boost voltage at an output terminal as a function of the control signal;

a comparator coupled to the charge pump and receiving a voltage which is proportional to the boost voltage, the comparator comparing the proportional voltage to a reference voltage and providing the control signal as a result of the comparison;

a voltage reference source coupled to the comparator to generate the reference voltage; and

an active voltage limiter coupled between the output terminal and a reference signal level, the voltage limiter comprising a plurality of series connected semiconductor devices to define a first threshold when the charge pump is in the standby mode wherein the boost voltage is limited to an output voltage related to the first threshold when the charge pump is in the standby mode, the voltage limiter further comprising a bypass semiconductor element selectively activated to bypass at least one of the series connected semiconductor devices when the charge pump is in the active mode to define a second threshold less than the first threshold wherein the boost voltage is limited to an output voltage related to the second threshold when the charge pump is in the active mode.

23. The voltage booster circuit of claim 22 wherein the comparator includes a differential amplifier, wherein the control signal enables the charge pump when the proportional voltage is less than the reference voltage and disables the charge pump when the proportional voltage is greater than the reference voltage.

24. The voltage booster circuit of claim 22, further comprising:

a reset circuit coupled to the charge pump, the reset circuit outputting a reset signal which disables the charge pump in order to initiate a low power condition in the voltage booster circuit, the reset circuit also for providing an accelerate signal; and

an acceleration circuit coupled to the reset circuit and the charge pump and receiving the accelerate signal, the acceleration circuit temporarily making the boost voltage equal to the supply voltage in order to initiate a normal condition in the voltage booster circuit.

25. A voltage booster coupled to a power supply and comprising:

a charge pump circuit having an output connected to a boost line to generate a boost voltage at said output;

a control circuit connected to said charge pump circuit and to said boost line to generate enabling and disabling signals for said charge pump circuit, said control circuit generating said enabling signals when the value of said boost voltage is below a predetermined lower limit and generating said disabling signals when the value of said boost voltage is above an upper predetermined limit, said control circuit including a reference source to generate a reference voltage that is independent of the power supply and is independent of temperature variations and a comparator circuit to compare said reference voltage with a voltage that is a function of said boost voltage; and

an acceleration circuit coupled between the power supply and said boost line and operative to couple said boost line to the power supply via a transistor for a predetermined period.

26. A voltage booster circuit receiving a supply voltage and generating a boost voltage greater than the supply voltage, the voltage booster circuit comprising:

a charge pump for providing the boost voltage on an output line;

a feedback controller coupled to the charge pump and adapted to receive the boost voltage, said feedback controller providing a control signal as a function of the boost voltage, said charge pump being adapted to receive said control signal so that the boost voltage is a function of said control signal;

a control capacitor having a first end coupled to a circuit node and a second end coupled to a circuit timing element that is activated for a predetermined period of time; and

a transistor having a first terminal coupled to the supply voltage, a second terminal coupled to said output line, and a control terminal coupled to said circuit node wherein said transistor is activated for said predetermined period of time to thereby accelerate the voltage on said output line to the supply voltage.