Data transmission circuit for an electricity mains network having a low reception threshold

• US 5,768,310 A
• Filed: 12/06/1995
• Issued: 06/16/1998
• Est. Priority Date: 12/16/1994
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Inventors: Huloux, Joel
• Primary Examiner(s): TSE, YOUNG TOI
• Application Number:
  US08/568,412
• Time in Patent Office: 923 Days
• Field of Search: 375/220, 375/222, 375/272, 375/377, 375/224, 455/78, 364/140, 364/492, 370/282
• US Class Current: 375/222
• CPC Class Codes: H04B 2203/5408 using protocols
• CPC Class Codes: H04B 2203/5416 by adding signals to the wave form of the power source
• CPC Class Codes: H04B 2203/5425 improving S/N by matching impedance, noise reduction, gain control
• CPC Class Codes: H04B 2203/5458 Monitor sensor; Alarm systems
• CPC Class Codes: H04B 3/54 Systems for transmission via power distribution lines
• CPC Class Codes: H04B 3/542 the information being in digital form
• CPC Class Codes: H04L 12/4135 using bit-wise arbitration

Abstract

The invention concerns a data transmission circuit, for use on a mains electricity network, that includes a modulator/ demodulator circuit that supplies a first signal, which indicates if the network is occupied, that is based upon a comparison between the level of a received signal and a predetermined threshold value and circuitry for switching a modem into its receive mode or its transmit mode, including a digital circuit that supplies a second signal that indicates the occupation of the network based on the identification of a predetermined data sequence that is present within each transmission stream before a data message and circuitry for allowing the modem to switch to its transmit mode when the occupation signals indicate an absence of a transmission.

Claims

1. A data transmission circuit, for use on a mains electricity network, includes a circuit that supplies a first signal that indicates one of when the network is occupied and when the network is not occupied based upon a comparison between a level of a received signal and a predetermined threshold value and means for indicating one of a receive mode and a transmit mode, includes a digital circuit that supplies a second signal different from the first signal that indicates one of occupation of the network and non-occupation of the network based on identification of a predetermined data sequence that is present before a data message within the received signal on the network and means for indicating the transmit mode when said first and second signals each indicates the network is not occupied.

2. The data transmission circuit according to claim 1, wherein said digital circuit includes a digital comparator having a first input to receive an output of a demodulator and a second input receiving a model of said predetermined data sequence, which is stored in a memory, and having an output providing said second signal that indicates that the network is occupied.

3. The data transmission circuit according to claim 2, wherein said digital circuit further includes a shift register connected between the output of said demodulator and said first input of the digital comparator, the comparator and said register being controlled by a clock signal that corresponds to a clock rate of the received data message.

4. The data transmission circuit according to claim 1, wherein said predetermined data sequence comprises a plurality of consecutive data bits.

5. A data transmission circuit according to claim 1, wherein the data message is modulated by frequency shift keying.

6. A data transmission circuit according to claim 1, wherein said predetermined data sequence is chosen such that it presents a low probability of occurring randomly in the received signal.

7. The data transmission circuit according to claim 6, wherein said predetermined data sequence comprises a plurality of consecutive data bits.

8. The data transmission circuit according to claim 7, wherein said predetermined data sequence comprises at least one data bit at a first logic state and at least one other data bit at a second logic state.

9. A system for detecting a data message on a mains electricity network, the system comprising:

an input lead to receive a modulated signal;

a level detecting circuit coupled to the input lead, the level detecting circuit to output a level detect signal having a first state indicating an absence of a transmission signal on the network and a second state indicating a presence of the transmission signal;

a demodulator coupled to the input lead, the demodulator to output a demodulated signal at a demodulator output;

a sequence detector coupled to the demodulator output, the sequence detector to output a sequence detect signal having a third state indicating detection of a predetermined data sequence and a fourth state indicating non-detection of the predetermined data sequence; and

a digital circuit to receive the level detect signal and the sequence detect signal, the digital circuit to determine a data message has been detected when the level detect signal is in the second state and the sequence detect signal is in the third state at a same time.

10. The system as recited in claim 9, wherein the predetermined data sequence comprises a plurality of consecutive data bits.

11. The system as recited in claim 10, wherein the predetermined data sequence is chosen such that it presents a low probability of occurring randomly on the network.

12. The system as recited in claim 11, wherein the predetermined data sequence comprises at least one data bit at a first logic state and at least one other data bit at a second logic state.

13. The system as recited in claim 9, further comprising a switch to couple the demodulated signal to the sequence detector only when the level detect signal is in the second state.

14. The system as recited in claim 9, wherein the sequence detector comprises:

a digital comparator to compare the demodulated signal to the predetermined data sequence and output the sequence detect signal in the third state when the predetermined data sequence has been detected.

15. The system as recited in claim 14, wherein the sequence detector further comprises:

a shift register coupled between the demodulator output and the input of the digital comparator, the shift register transmitting the demodulated signal to the comparator at a clock rate of the demodulated signal.

16. The system as recited in claim 9, wherein the sequence detector further comprises:

a memory to store the predetermined data sequence.

17. A system for detecting a data message on a mains electricity network carrying a modulated signal, the system comprising:

first means for receiving the modulated signal;

means for comparing a modulated signal level of the modulated signal to a predetermined threshold level and generating a level comparison signal when the modulated signal level is at least the threshold level;

means for generating a demodulated signal from the modulated signal;

second means for detecting a predetermined data sequence in the demodulated signal and for outputting a sequence detect signal at one of a first level when the predetermined data sequence has been detected and a second level when the predetermined data sequence has not been detected; and

third means for determining the data message has been detected when the sequence detect signal is at the first level and the level comparison signal is present, otherwise determining that the data message has not been detected.

18. The system as recited in claim 17, wherein the predetermined data sequence comprises a plurality of consecutive data bits.

19. The system as recited in claim 17, wherein the second means comprises comparing means for comparing the demodulated signal to the predetermined data sequence.

20. The system as recited in claim 17, wherein the second means further comprises storage means for storing the predetermined data sequence.

21. A method for detecting when a mains electricity network is available for transmitting a data message, the method comprising the steps of:

(a) receiving a modulated signal on the network;

(b) comparing a modulated signal level of the modulated signal to a predetermined threshold level;

(c) generating a level comparison signal in a first state when said step (b) indicates the network is available;

(d) generating the level comparison signal in a second state when said step (b) indicates the network is not available;

(e) demodulating the modulated signal to create a demodulated signal;

(f) determining whether or not a predetermined data sequence is found in the demodulated signal; and

(g) when the predetermined data sequence has been found in the demodulated signal and the level comparison signal is in the second state, indicating that the mains electricity network is not available, otherwise indicating that the mains network is available.

22. The method as recited in claim 21, wherein the step of determining whether or not the modulated signal is present on the network comprises the step of:

determining whether or not the modulated signal level of the modulated signal is at least the predetermined threshold level.

23. The method as recited in claim 21, wherein the predetermined data sequence comprises a plurality of consecutive data bits and step (f) comprises the step of:

comparing the consecutive data bits of the predetermined data sequence to consecutive data bits of the demodulated signal at a clock rate of the demodulated signal.

24. The method as recited in claim 21, further including a step of choosing the predetermined data sequence to be one that presents a low probability of occurring randomly in the demodulated signal.