Symbol synchronizer using modified early/punctual/late gate technique

• US 5,768,323 A
• Filed: 10/13/1994
• Issued: 06/16/1998
• Est. Priority Date: 10/13/1994
• Status: Expired due to Term

• Current Assignee: iBiquity Digital Corporation (Adeia Inc.)
• Original Assignee: Westinghouse Electric Company LLC (Brookfield Asset Management Incorporated)
• Inventors: Oblak, Tod A., Bronder, Joseph B., Kroeger, Brian W., Baird, Jeffrey S.
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): WEBSTER, BRYAN E
• Application Number:
  US08/322,854
• Time in Patent Office: 1,342 Days
• Field of Search: 375/304, 375/324, 375/326, 375/340, 375/343, 375/346, 375/350, 375/355, 375/344, 375/345
• US Class Current: 375/355
• CPC Class Codes: H03L 7/0994 comprising an accumulator
• CPC Class Codes: H04L 27/2273 associated with quadrature demodulation, e.g. Costas loop
• CPC Class Codes: H04L 7/0029 interpolation of received data signal
• CPC Class Codes: H04L 7/0083 taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Abstract

A method and apparatus for synchronizing symbol timing for a QPSK demodulator. A matched filter pair outputs respective "early-punctual-late" signals. The early and late signals are input to a symbol synchronizing estimator that produces an interpolation control signal used by the filters to synchronize the symbol timing to the sample timing. The punctual signal is output as an information bearing signal representing the received inphase and quadrature signals. The matched filters are interpolating matched filters. The symbol synchronizing estimator normalizes the early and late signals in a manner that allow the demodulator to "flywheel" over signals having a low signal to noise ratio below a predetermined threshold.

Claims

1. A symbol synchronizer in a telecommunications device, comprising:

a plurality of filters, receiving a sequence of incoming pairs of inphase and quadrature signals in accordance with a symbol timing, each of the pair of matched filters outputting an early signal, a punctual signal, and a late signal, the early signal and the late signal indicating an error in synchronization between the symbol timing of the received signals and the timing of the matched filter, and the punctual signal being an information bearing signal indicating the contents of the received inphase and quadrature signals;

a symbol synchronizing estimator, connected to the plurality of matched filters, receiving from each of the pair of matched filters the early signal and the late signal and outputting an interpolation signal to the pair of matched filters;

means for adjusting the relative delay of the matched filters with regard to the symbol timing of the received signal in accordance with the interpolation signal;

wherein the symbol synchronizing estimator includes rectifying means for rectifying the early signal and the late signal and for outputting a plurality of rectified signals; and

means, connected to the rectifying means, for determining a sum signal of the rectified signals and a difference signal of the rectified signals; and

further including a normalizer for normalizing the sum and difference signal by the sum signal.

2. A symbol synchronizer in a telecommunications device, comprising:

a plurality of filters, receiving a sequence of incoming pairs of in-phase and quadrature signals in accordance with a symbol timing, each of the pair of matched filters outputting an early signal, a punctual signal, and a late signal, the early signal and the late signal indicating an error in synchronization between the symbol timing of the received signals and the timing of the matched filter, and the punctual signal being an information bearing signal indicating the contents of the received in-phase and quadrature signals;

a symbol synchronizing estimator, connected to the plurality of matched filters, receiving from each of the pair of matched filters the early signal and the late signal and outputting an interpolation signal to the pair of matched filters; and

means for adjusting the relative delay of the matched filters with regard to the symbol timing of the received signal in accordance with the interpolation signal;

wherein the symbol synchronizing estimator includes suppression means for suppressing the interpolation signal when the received signals fall below a predetermined signal to noise ratio, thereby enabling the symbol synchronizer to "flywheel" through signal fades;

wherein the suppression means is a constant value in a normalizer for normalizing a sum and a difference signal based on the received in-phase and quadrature signals.

3. A symbol synchronizer in a telecommunications device, comprising:

a plurality of filters, receiving a sequence of incoming pairs of in-phase and quadrature signals in accordance with a symbol timing, each of the pair of matched filters outputting an early signal, a punctual signal, and a late signal, the early signal and the late signal indicating an error in synchronization between the symbol timing of the received signals and the timing of the matched filter, and the punctual signal being an information bearing signal indicating the contents of the received in-phase and quadrature signals;

a symbol synchronizing estimator, connected to the plurality of matched filters, receiving from each of the pair of matched filters the early signal and the late signal and outputting an interpolation signal to the pair of matched filters; and

means for adjusting the relative delay of the matched filters with regard to the symbol timing of the received signal in accordance with the interpolation signal wherein the adjusting means includes means for switching between a plurality of sets of filter coefficients in the matched filters;

wherein each matched filter has eight sets of coefficients, the timing of each set differing by one eighth of a sample.