Token-based adaptive video processing arrangement

• US 5,768,629 A
• Filed: 06/07/1995
• Issued: 06/16/1998
• Est. Priority Date: 06/24/1993
• Status: Expired due to Term

• Current Assignee: Talon Research LLC
• Original Assignee: Discovision Associates (Pioneer Corporation)
• Inventors: Finch, Helen Rosemary, Jones, Anthony Mark, Smith, Colin, Barnes, Mark, Claydon, Anthony Peter John, Wise, Adrian P., Barnes, David Andrew, Robbins, William P., Birch, Nicholas, Kuligowski, Andrew Peter, Sotheran, Martin William, Dewar, Kevin D., Patterson, Donald William
• Primary Examiner(s): DINH, DUNG C
• Application Number:
  US08/479,910
• Time in Patent Office: 1,105 Days
• Field of Search: 395/800, 395/506, 395/500, 395/800.01, 395/800.36, 395/888, 364/736, 341/81, 341/109, 341/165, 341/184, 348/512, 348/500, 348/501, 345/506, 345/418, 345/302, 345/428, 345/501
• US Class Current: 710/68
• CPC Class Codes: G06F 12/0207 with multidimensional access, e.g. row/column, matrix
• CPC Class Codes: G06F 12/04 Addressing variable-length words or parts of words
• CPC Class Codes: G06F 13/16 for access to memory bus G06F13/28 takes precedence
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: H04N 19/13 Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
• CPC Class Codes: H04N 19/42 characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation H04N19/635 takes precedence
• CPC Class Codes: H04N 19/423 characterised by memory arrangements H04N19/433 takes precedence
• CPC Class Codes: H04N 19/61 in combination with predictive coding
• CPC Class Codes: H04N 19/91 Entropy coding, e.g. variable length coding [VLC] or arithmetic coding
• CPC Class Codes: H04N 21/4305 Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083
• CPC Class Codes: H04N 21/43072 of multiple content streams on the same device
• CPC Class Codes: H04N 21/44004 involving video buffer management, e.g. video decoder buffer or video display buffer

Abstract

An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.

Claims

1. A pipelined video decoder system having an input, an output and a plurality of processing stages therebetween, comprising:

a universal adaptation unit in the form of a first interactive interfacing token for control and/or data functions among said processing stages;

a token generator, responsive to a picture start code in an input stream of encoded data for generating said first interactive interfacing token, wherein said first interactive interfacing token is serially transmitted through said processing stages;

wherein said first interactive interfacing token is a GROUP_-- START token for indicating a start of a group sequence; and

upon generation of said GROUP_-- START token, said token generator generates a second interactive metamorphic interfacing token comprising a PICTURE_-- END token, said PICTURE_-- END token being serially transmitted to said processing stages before data associated with said start code is output, wherein responsive to said PICTURE_-- END token one of said processing stages stops processing a current picture in a first mode of operation, and said one processing stage generates a FLUSH token in a second mode of operation, wherein processing of said current picture is completed in a controlled manner.

2. The system according to claim 1, wherein said input stream of encoded data comprises MPEG data.

3. The system according to claim 1, wherein said token generator operates on byte aligned data.

4. The system according to claim 1, further comprising a microprocessor interface operatively associated with said processing stages, wherein said microprocessor interface is responsive to a signal IN_-- TOKEN without detection of an end marker of said first interactive interfacing token.

5. The system according to claim 1, wherein said token generator detects overlapping start codes,

whereby a first overlapping start code is ignored and a second overlapping start code is used to generate start code tokens.

6. A pipelined video decoder system having an input, an output and a plurality of processing stages therebetween, comprising:

a universal adaptation unit in the form of a first interactive interfacing token for control and/or data functions among said processing stages, wherein said first interactive interfacing token is a GROUP_-- START token for indicating a start of a group sequence;

a token generator, responsive to a start code in an input stream of encoded MPEG data for generating said first interactive interfacing token, wherein said first interactive interfacing token is serially transmitted to said processing stages;

wherein upon generation of said GROUP_-- START token, said token generator generates a second interactive metamorphic interfacing token comprising a PICTURE_-- END token, said PICTURE_-- END token being serially transmitted to said processing stages before data associated with said start code is output, wherein responsive to said PICTURE_-- END token one of said processing stages stops processing a current picture in a first mode of operation, and said one processing stage generates a FLUSH token in a second mode of operation, wherein processing of said current picture is completed in a controlled manner.

7. The system according to claim 6, wherein said token generator operates on byte aligned data.

8. The system according to claim 6, further comprising a microprocessor interface operatively associated with said processing stages, wherein said microprocessor interface is responsive to a signal IN_-- TOKEN without detection of an end marker of said first interactive interfacing token.

9. The system according to claim 6, wherein said token generator detects overlapping start codes,

whereby a first overlapping start code is ignored and a second overlapping start code is used to generate start code tokens.