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Process for forming a diffusion barrier using an insulating spacer layer

  • US 5,770,498 A
  • Filed: 01/31/1996
  • Issued: 06/23/1998
  • Est. Priority Date: 01/31/1996
  • Status: Expired due to Term
First Claim
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1. A process for making a semiconductor device, comprising the steps of:

  • a. forming a gate electrode over a semiconductor substrate;

    b. defining first and second contact regions in the substrate adjacent sides of the gate electrode;

    c. conformally depositing a spacer insulating layer over the gate electrode and the contact regions;

    d. partially etching the spacer insulating layer to remove only a portion of the thickness of the spacer insulating layer at least over the contact regions;

    e. forming a lower insulating layer over the spacer insulating layer;

    f. patterning and etching the lower insulating layer to form a capacitor container over the first contact region and to expose the spacer insulating layer over the first contact region; and

    g. etching the exposed portion of the spacer insulating layer to expose the first contact region.

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