Real time charging control of a fast battery charger

• US 5,770,938 A
• Filed: 12/09/1996
• Issued: 06/23/1998
• Est. Priority Date: 12/09/1996
• Status: Expired due to Term

• Current Assignee: Transpacific IP Group Limited
• Original Assignee: Industrial Technology Research Institute
• Inventors: Kao, Hsueh-Wu
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): SHIN, KYUNG E
• Application Number:
  US08/762,485
• Time in Patent Office: 561 Days
• Field of Search: 320/39, 320/40, 320/30, 320/31, 320/20, 320/148, 320/161, 324/429
• US Class Current: 320/148
• CPC Class Codes: H02J 7/007184 in response to battery voltage gradient

Abstract

Methods and circuits are disclosed which terminate charging of a battery when the maximum charge is reached. Maximum charge is reached when the battery voltage has peaked, after a long rise, and just starts to drop. This small voltage drop, or delta, is detected by a charger control which compares the real time battery voltage with a previously sampled battery voltage. Upon detecting this small voltage drop, the charger control terminates the charging process. Implementations using an analog delta voltage detection and a digital delta voltage detection are described.

Claims

1. A circuit for detecting when a battery has reached its peak charge and charging must be terminated, comprising:

an analog-to-digital converter with a first input and first output, said analog-to-digital converter changing an analog signal into a digital data;

a digital clocking means with a second and third output, said digital clocking means providing a coarse strobe at said second output and a fine strobe at said third output for latching up data at periodic intervals;

a first register with a second and third input and a fourth output, said second input connected to said first output and said third input connected to said second output, said register latching up and storing digital data;

a second register with a fourth and fifth input and a fifth output, said fourth input connected to said first output and said fifth input connected to said third output, said register latching up and storing digital data;

a digital comparator with a sixth and seventh input and a sixth output, said sixth input connected to said fourth output and said seventh input connected to said fifth output, said digital comparator providing at said sixth output the difference in voltage between said sixth and seventh input, said difference in voltage being negative when the magnitude of said seventh input is less than that of said sixth input;

a control logic with an eighth input and a seventh output, said eighth input connected to said sixth output, said control logic terminating said charging of said battery when said control logic determines that said difference in voltage exceeds a fixed and predetermined amount, and

a battery with a ninth input, said ninth input connected to said first input and said seventh output, said battery being able to accept and deliver electrical charge at said ninth input,

wherein a positive going transition of said fine strobe is offset by 180 degrees relative to a positive going transition of said coarse strobe, so that positive transitions of said fine and coarse pulses do not coincide in time.

2. The circuit of claim 1, wherein said analog-to-digital converter provides a resolution of said first input signal in the range of 0.0375 to 0.6 mVolts.

3. The circuit of claim 1, wherein said coarse strobe of said digital clocking means has a period in the range of 5 to 100 seconds.

4. The circuit of claim 1, wherein said fine strobe of said digital clocking means is an integer multiple of said coarse strobe, ranging from 4 to 32.

5. The circuit of claim 1, wherein said first register has a data width in the range of 12 to 16 bits.

6. The circuit of claim 1, wherein said second register has a data width in the range of 12 to 16 bits.

7. The circuit of claim 1, wherein said control logic terminates charging of said battery when said control logic determines that said difference in voltage is negative, and its magnitude is equal or larger than 4 mVolts.

8. The circuit of claim 1, wherein said analog-to-digital converter is a dual-slope analog-to-digital converter.