Thin film transistor device, display device and method of fabricating the same

• US 5,771,110 A
• Filed: 07/02/1996
• Issued: 06/23/1998
• Est. Priority Date: 07/03/1995
• Status: Expired due to Fees

• Current Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Sotani, Naoya, Yoneda, Kiyoshi, Yamaji, Toshifumi, Morimoto, Yoshihiro, Hirano, Kiichi
• Primary Examiner(s): Munson, Gene M.
• Application Number:
  US08/677,424
• Time in Patent Office: 721 Days
• Field of Search: 257/72, 257/75, 257/59, 257/66
• US Class Current: 257/72
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1281 by using structural features to control crystal growth, e.g. placement of grain filters
• CPC Class Codes: H01L 27/1285 using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

Claims

1. A semiconductor device being formed by integrating a plurality of semiconductor elements and a substrate, said semiconductor device comprising:

each said semiconductor element has a heat absorption film provided between said substrate and said semiconductor elements, and an area or film thickness of said heat absorption film is relatively reduced in a portion where a relatively large number of said semiconductor elements are provided, while an area or film thickness of said heat absorption film is relatively increased in a portion where a relatively small number of said semiconductor elements are provided, in accordance with a distributed state of said semiconductor elements on said substrate.

3. The semiconductor device in accordance with claim 1, wherein said area or film thickness of said heat absorption film is so adjusted that heat absorption of said absorption film functions substantially uniformly on said whole substrate.

4. The semiconductor device in accordance with claim 1, wherein said heat absorption film is made of a conductive material such as a metal or metal silicide, or a semiconductor material such as silicon.

2. A semiconductor device being formed by integrating a plurality of semiconductor switching elements on a substrate, each said semiconductor switching element comprising:

a heat absorption film being formed on said substrate;

an insulating film formed on said heat absorption film;

a semiconductor film being formed on said insulating film;

a gate electrode being formed on said semiconductor film through a gate insulating film; and

an impurity region being formed in said semiconductor film;

wherein an area or film thickness of said heat absorption film is relatively reduced in a portion where a relatively large number of said semiconductor elements are provided, while an area or film thickness of said heat absorption film is relatively increased in a portion where a relatively small number of said semiconductor elements are provided, in accordance with the distributed state of said semiconductor elements on said substrate.

5. A semiconductor device being formed by integrating a plurality of semiconductor elements on a substrate, said plurality of semiconductor elements comprising a plurality of first semiconductor elements each having a heat absorption film and a plurality of second semiconductor elements each not having a heat absorption film;

wherein said second semiconductor elements are relatively concentrated in a portion where a relatively large number of said semiconductor elements are provided, while said first semiconductor elements are relatively concentrated in a portion where a relatively small number of said semiconductor elements are provided, in accordance with the distributed state of said semiconductor elements on said substrate.

6. A driver-integrated display device having a pixel part and a peripheral driving circuit part being formed on the same substrate, said driver-integrated display device comprising:

a pixel driving element being provided in said pixel part; and

a peripheral driving circuit element being provided in said peripheral driving circuit part;

wherein

said pixel driving element and said peripheral driving circuit element are formed by semiconductor switching elements, and

each said semiconductor element comprises;

a heat absorption film being formed on said substrate,

an insulating film formed on said heat absorption film;

a semiconductor film being formed on insulating film,

a gate electrode being formed on said semiconductor film through a gate insulating film, and

an impurity region being formed in said semiconductor film,

a ratio of area or film thickness of said heat absorption film relative to said semiconductor film in said pixel part being adjusted to be larger than that of said heat absorption film in said peripheral driving circuit part.

7. The display device in accordance with claim 6, wherein said area of said heat absorption film in said pixel part is set to 0.01 to 60% of the whole area of said pixel part.

8. The display device in accordance with claim 6, wherein said area of said heat absorption film in said peripheral driving circuit part is set to 0.01 to 60% of the whole area of said peripheral driving circuit part.

9. The display device in accordance with claim 6, wherein said area of said heat absorption film in said substrate is set to 0.01 to 60% of the whole area of said substrate.

10. The display device in accordance with claim 6, wherein said substrate is one of a pair of substrates being opposed to each other through a liquid crystal layer.

11. The display device in accordance with claim 6, wherein each said heat absorption film is provided in a size and within an area substantially corresponding to a channel region of each said semiconductor film.

12. The display device in accordance with claim 6, wherein said heat absorption effect of each said heat absorption film is adjusted by changing the area or the thickness of said heat absorption film.

13. The display device in accordance with claim 6, wherein an insulating film is formed on each said heat absorption film.

14. The display device in accordance with claim 6, wherein each said heat absorption film is made of a conductive material such as a metal or metal silicide, or a semiconductor material such as silicon.

15. The display device in accordance with claim 6, wherein each said heat absorption film acts as a shade.

16. The display device in accordance with claim 6, wherein said substrate is a transparent substrate.

17. The display device in accordance with claim 6, wherein RTA employing a xenon arc lamp as a heat source is employed as said heat treatment.

18. A display device being formed by integrating a plurality of semiconductor elements on a substrate, said plurality of semiconductor elements comprising a plurality of first semiconductor elements each having a heat absorption film and a plurality of second semiconductor elements each not having a heat absorption film;

wherein said second semiconductor elements are relatively concentrated in a portion where a relatively large number of said semiconductor elements are provided, while said first semiconductor elements are relatively concentrated in a portion where a relatively small number of said semiconductor elements are provided, in accordance with the distributed state of said semiconductor elements on said substrate.