High frequency semiconductor component
First Claim
1. A high frequency semiconductor component comprising:
- a first substrate having a first surface opposite a second surface, the first substrate comprised of a semiconductor substrate, the first and second surfaces at opposites sides of the semiconductor substrate;
a first transmission line supported by the first surface of the first substrate;
an integrated circuit supported by and located at least partially within the first surface of the first substrate, the integrated circuit electrically coupled to the first transmission line;
a second transmission line supported by the second surface of the first substrate, the second transmission line electrically coupled to the first transmission line by a d.c. connection;
a second substrate having a first surface and a second surface wherein the first surface faces towards the second surface of the first substrate;
a third transmission line supported by the first surface of the second substrate and underlying the second transmission line; and
an electrically insulating layer between the second and third transmission lines, the second and third transmission lines capable of being electrically coupled together by a high frequency signal through the electrically insulating layer, the second and third transmission lines devoid of a d.c. connection with each other.
21 Assignments
0 Petitions
Accused Products
Abstract
A high frequency semiconductor component (10) includes a first substrate (12) having a first surface (13) opposite a second surface (14), a first electrically conductive layer (16) supported by the first surface (13) of the first substrate (12), a second electrically conductive layer (17) supported by the second surface (14) of the first substrate (12) wherein the second electrically conductive layer (17) is electrically coupled to the first electrically conductive layer (16), a second substrate (19) having a first surface (20) and a second surface (21), a third electrically conductive layer (22) supported by the first surface (20) of the second substrate (19), and an electrically insulating layer (23) between the second and third electrically conductive layers (17, 22) wherein the second and third electrically conductive layers (17, 22) are electrically coupled together through the electrically insulating layer (23).
18 Citations
18 Claims
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1. A high frequency semiconductor component comprising:
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a first substrate having a first surface opposite a second surface, the first substrate comprised of a semiconductor substrate, the first and second surfaces at opposites sides of the semiconductor substrate; a first transmission line supported by the first surface of the first substrate; an integrated circuit supported by and located at least partially within the first surface of the first substrate, the integrated circuit electrically coupled to the first transmission line; a second transmission line supported by the second surface of the first substrate, the second transmission line electrically coupled to the first transmission line by a d.c. connection; a second substrate having a first surface and a second surface wherein the first surface faces towards the second surface of the first substrate; a third transmission line supported by the first surface of the second substrate and underlying the second transmission line; and an electrically insulating layer between the second and third transmission lines, the second and third transmission lines capable of being electrically coupled together by a high frequency signal through the electrically insulating layer, the second and third transmission lines devoid of a d.c. connection with each other. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A semiconductor component comprising:
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a first substrate having a first surface, a second surface, and a side surface wherein the side surface couples the first and second surfaces, wherein the first substrate is comprised of a semiconductor substrate, and wherein the first and second surfaces are located at opposite sides of the semiconductor substrate; a semiconductor device supported by and located at least partially within the first surface of the first substrate; a first electrically conductive layer coupled to the first surface of the first substrate, the first electrically conductive layer electrically coupled to the semiconductor device; a second electrically conductive layer coupled to a first portion of the second surface of the first substrate, the second electrically conductive layer electrically coupled to the first electrically conductive layer; and a third electrically conductive layer coupled to a second portion of the second surface of the first substrate, the third electrically conductive layer devoid of a d.c. connection with the first and second electrically conductive layers, the third electrically conductive layer having a hole wherein the second electrically conductive layer is located in the hole. - View Dependent Claims (8, 9, 10, 11)
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12. A semiconductor component comprising:
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a semiconductor substrate having a first surface and a second surface wherein the first and second surfaces are opposite each other; a semiconductor device in the first surface of the semiconductor substrate; a first metal layer electrically coupled to the semiconductor device, the first metal layer adjacent to the first surface of the semiconductor substrate; an additional substrate having a first surface and a second surface, the first surface of the additional substrate facing towards the second surface of the semiconductor substrate, the additional substrate comprised of an other semiconductor substrate wherein the first and second surfaces of the additional substrate are at opposite sides of the other semiconductor substrate; a second metal layer adjacent to the first surface of the additional substrate, the second metal layer under the second surface of the semiconductor substrate, the second metal layer under a portion of the first metal layer; a third metal layer adjacent to the second surface of the semiconductor substrate, the third metal layer devoid of a d.c. connection with the first and second metal layers, the third metal layer having a hole under the first metal layer to permit electrical coupling between the first and second metal layers; a dielectric layer located between the second metal layer and the third metal layer and between the first surface of the additional substrate and the second surface of the semiconductor substrate, the second metal layer electrically coupled to the first metal layer through the semiconductor substrate and through the dielectric layer, the first and second metal layers; a fourth metal layer adjacent to the second metal layer and the first surface of the additional substrate, the fourth metal layer devoid of a d.c. connection with the first and second metal layers wherein the dielectric layer is between the third and fourth metal layers and wherein the fourth metal layer is electrically coupled to the third metal layer by a high frequency signal through the dielectric layer. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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Specification