Manufacturing method of semiconductor device
First Claim
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1. A method of manufacturing a semiconductor device comprising steps of:
- providing a semiconductor layer disposed on a semiconductor substrate;
forming a mask having an opening part within a specified region on a main surface of the semiconductor layer;
generating plasma within a plasma generation chamber containing an etching gas to form a chemically active etching gas, the plasma generation chamber being physically separated from a reaction chamber in which the semiconductor substrate and the semiconductor layer are disposed;
introducing the chemically active etching gas into the reaction chamber by transporting the chemically active gas from the plasma generation chamber to the reaction chamber via a passageway between the plasma generation chamber and the reaction chamber, the chemically active gas performing a chemical dry etching process to define a groove in the semiconductor layer, the groove including;
an inlet part wider than the opening part of the mask,a bottom surface generally parallel to the main surface, anda side surface connecting the inlet part and the bottom surface;
forming an oxide film to a specified thickness on the bottom surface and the side surface of the groove by oxidizing a region of the semiconductor layer including the groove;
performing an impurity introduction process comprising the steps of;
forming a base layer of a second conductivity type within the semiconductor layer by introducing impurities of the second conductivity type, from the main surface including the surface of the semiconductor layer adjacent to the oxide film,forming a source layer of the first conductivity type within the base layer by introducing impurities of the first conductivity type from the main surface, andforming a channel region at a surface of a side wall of the base layer concurrently with the step of forming the source layer;
performing a wet etching process to remove the oxide film; and
performing an electrode formation process including steps of;
forming a gate electrode at least on a surface of the groove between the source layer and the semiconductor layer with a gate insulating film interposed therebetween,forming a source electrode which contacts the source layer and the base layer electrically, and forming a drain electrode which contacts the semiconductor substrate electrically.
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Abstract
A manufacturing method of a MOSFET having a channel part on the side surface of a groove, which does not permit the introduction of defects or contaminant into the channel part and which can make the shape of the groove uniform. An n- -type epitaxial layer having a low impurity concentration is formed on a main surface of an n+ -type semiconductor substrate. This surface is specified as a main surface, and chemical dry etching is applied to a specified region of this main surface. A region including a surface generated by the chemical dry etching is selectively oxidized to form a selective oxide film to a specified thickness. Following this process, p-type and n-type impurities are doubly diffused from the main surface to define the length of the channel and form a base layer and a source layer. Furthermore, the n+ -type semiconductor substrate is specified as a drain layer. After the double diffusion, a gate electrode is formed through a gate oxide film and a source electrode and a drain electrode are formed.
59 Citations
57 Claims
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1. A method of manufacturing a semiconductor device comprising steps of:
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providing a semiconductor layer disposed on a semiconductor substrate; forming a mask having an opening part within a specified region on a main surface of the semiconductor layer; generating plasma within a plasma generation chamber containing an etching gas to form a chemically active etching gas, the plasma generation chamber being physically separated from a reaction chamber in which the semiconductor substrate and the semiconductor layer are disposed; introducing the chemically active etching gas into the reaction chamber by transporting the chemically active gas from the plasma generation chamber to the reaction chamber via a passageway between the plasma generation chamber and the reaction chamber, the chemically active gas performing a chemical dry etching process to define a groove in the semiconductor layer, the groove including; an inlet part wider than the opening part of the mask, a bottom surface generally parallel to the main surface, and a side surface connecting the inlet part and the bottom surface; forming an oxide film to a specified thickness on the bottom surface and the side surface of the groove by oxidizing a region of the semiconductor layer including the groove; performing an impurity introduction process comprising the steps of; forming a base layer of a second conductivity type within the semiconductor layer by introducing impurities of the second conductivity type, from the main surface including the surface of the semiconductor layer adjacent to the oxide film, forming a source layer of the first conductivity type within the base layer by introducing impurities of the first conductivity type from the main surface, and forming a channel region at a surface of a side wall of the base layer concurrently with the step of forming the source layer; performing a wet etching process to remove the oxide film; and performing an electrode formation process including steps of; forming a gate electrode at least on a surface of the groove between the source layer and the semiconductor layer with a gate insulating film interposed therebetween, forming a source electrode which contacts the source layer and the base layer electrically, and forming a drain electrode which contacts the semiconductor substrate electrically. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55)
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11. The method of manufacturing a semiconductor device according to claim wherein:
the step of removing the oxide film terminates a dangling bond generated on the surface of the oxide film within an aqueous solution containing hydrofluoric acid.
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56. A method of manufacturing a semiconductor device comprising steps of:
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performing a selective oxidation process including steps of; forming a semiconductor layer of a first conductivity type on a semiconductor substrate, the semiconductor layer having an impurity concentration lower than an impurity concentration of the semiconductor substrate, and forming a selective oxide film to a specified depth within a specified region of the semiconductor layer from a first main surface thereof by the steps of; specifying a region on a surface of the semiconductor layer having the low impurity concentration as the first main surface, and selectively oxidizing the specified region; performing an impurity introduction process comprising steps of; diffusing an impurity of a second conductivity type from the first main surface and then an impurity of the first conductivity type into the impurity of the second conductivity type to form a channel near a surface of the semiconductor layer in contact with the selective oxide film, whereby a length of the channel is defined, a base layer of the second conductivity type and a source layer of the first conductivity type are concurrently formed and the semiconductor layer as a drain layer of the first conductivity type are specified; removing the selective oxide film to form a groove to a specified depth; performing a gate formation process to form a gate oxide film, including steps of; oxidizing an inside wall of the groove exposed to a part to be the channel, and forming a gate electrode on the gate oxide film; and performing a source and drain electrode formation process by steps of; forming a source electrode which is to electrically contact both the source layer and the base layer, and forming a drain electrode which is to electrically contact a second main surface side of the semiconductor substrate; an index of plane of a surface of the semiconductor substrate being set to (100); an oxidation resistant mask in the selective oxidation process being patterned at substantially one of a right angle and parallel to an orientation of <
011>
of the surface on the semiconductor substrate; andan index of plane of a side surface of the groove is set to (111).
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57. A method of manufacturing a semiconductor device comprising:
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performing a selective oxidation process including steps of; forming a semiconductor layer of a first conductivity type on a semiconductor substrate, the semiconductor layer having an impurity concentration lower than an impurity concentration of the semiconductor substrate, and forming a selective oxide film to a specified depth within a specified region of the semiconductor layer from a first main surface thereof by steps of; specifying a region of a surface of the semiconductor layer having the low impurity concentration as the first main surface, and selectively oxidizing the specified region; performing an impurity introduction process comprising steps of; diffusing an impurity of a second conductivity type from the first main surface and then an impurity of the first conductivity type into the impurity of the second conductivity type to form a channel near a surface of the semiconductor layer in contact with the selective oxide film, whereby a length of the channel is defined, a base layer of the second conductivity type and a source layer of the first conductivity type are concurrently formed and the semiconductor layer as a drain layer of the first conductivity type are specified; removing the selective oxide film to form a groove to a specified depth; performing a gate formation process to form a gate oxide film, including steps of; oxidizing an inside wall of the groove exposed a part to be the channel, and forming a gate electrode on the gate oxide film; and performing a source and drain electrode formation process by steps of; forming a source electrode which electrically contacts both the source layer and the base layer, and forming a drain electrode which electrically contacts a second main surface side of the semiconductor substrate; an index of plane of a surface of the semiconductor substrate being set to (100); an oxidation resistant mask in the selective oxidation process being patterned at substantially one of a right angle and parallel to an orientation of <
001>
of the surface on the semiconductor substrate; andan index of plane of a side surface of the groove is set to (110).
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Specification
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Current AssigneeNippondenso Co., Ltd. (DENSO Corporation)
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Original AssigneeNippondenso Co., Ltd. (DENSO Corporation)
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InventorsTakeuchi, Yuuchi, Tokura, Norihito, Takahashi, Shigeki, Yamamoto, Tsuyoshi, Kataoka, Mitsuhiro
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Primary Examiner(s)Nguyen, Tuan H.
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Application NumberUS08/413,410Time in Patent Office1,195 DaysField of Search438/268, 438/270, 438/271, 438/700, 438/710US Class Current438/268CPC Class CodesH01L 29/045 by their particular orienta...H01L 29/0696 of cellular field-effect de...H01L 29/4236 within a trench, e.g. trenc...H01L 29/7813 with trench gate electrode,...
