Display device

• US 5,777,701 A
• Filed: 05/07/1996
• Issued: 07/07/1998
• Est. Priority Date: 05/08/1995
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Zhang, Hongyong
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): TON, MINH TOAN T
• Application Number:
  US08/646,512
• Time in Patent Office: 791 Days
• Field of Search: 349/38, 349/39, 349/42, 349/44, 349/138
• US Class Current: 349/44
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors

Abstract

A metal electrode also serving as a black matrix is so formed as to cover the periphery of an ITO pixel electrode. A region where the pixel electrode and the metal electrode coextend also serves as an auxiliary capacitor. Since the auxiliary capacitor can be formed by using a thin insulating film, it can have a large capacitance. By virtue of the structure in which the black matrix also serves as the auxiliary capacitor, it is not necessary to provide an electrode dedicated to the auxiliary capacitor, thereby preventing reduction in aperture ratio. Further, the black matrix can completely shield a source line and a gate line from light.

Claims

1. A display device, comprising:

a thin film transistor formed on a substrate, said thin film transistor having source, drain and channel regions and a gate electrode adjacent to said channel region with a gate insulating film between said gate electrode and said channel region;

a gate line electrically connected to said gate electrode and configured to extend in a first direction on said substrate;

a first interlayer insulating film formed over said thin film transistor and said gate line;

a source line formed on said first interlayer insulating film and electrically connected to the source region of said transistor through a first contact hole of said first interlayer insulating film, wherein said source line extends in a second direction substantially orthogonal to said gate line to define a pixel region;

a second interlayer insulating film formed on said first interlayer insulating film and said source line;

a light shielding layer formed on said second interlayer insulating film to shield at least said source line and said gate line;

a drain electrode formed on said second interlayer insulating film and electrically connected to said drain region of said transistor through a second contact hole formed in said first and second interlayer insulating films;

a third interlayer insulating film formed on said second interlayer insulating film and said light shielding layer; and

a pixel electrode formed on said third interlayer insulating film and electrically connected to said drain electrode through a third contact hole formed in said third interlayer insulating film,

wherein a part of said light shielding layer overlaps with a periphery of said pixel electrode with said third interlayer insulating film interposed between said light shielding layer and said pixel electrode to form a storage capacitor.

2. A display device according to claim 1 wherein said light shielding layer comprises titanium or chromium.

3. A display device according to claim 1 wherein said first interlayer insulating film comprises silicon oxide.

4. A display device according to claim 1 wherein said thin film transistor has a top-gate structure in which said gate electrode is located over said channel region.

5. A display device according to claim 1 wherein said pixel electrode partially overlaps with said source line and said gate line.

6. A display device comprising:

a thin film transistor formed on a substrate, said thin film transistor having source, drain and channel regions and a gate electrode adjacent to said channel region with a gate insulating film therebetween;

a gate line electrically connected to said gate electrode and configured to extend in a first direction on a substrate;

a first interlayer insulating film formed over said thin film transistor and said gate line;

a source line formed on said first interlayer insulating film and electrically connected to the source region of said transistor through a first contact hole of said first interlayer insulating film wherein said source line extends in a second direction substantially orthogonal to said gate line to define a pixel region;

a second interlayer insulating film formed on said first interlayer insulating film and said source line;

a light shielding layer formed on said second interlayer insulating film to shield at least said source line and said gate line;

a third interlayer insulating film formed on said second interlayer insulating film and said light shielding layer; and

a pixel electrode formed on said third interlayer insulating film and electrically connected to said drain region of the transistor,

wherein a part of said light shielding layer overlaps with a periphery of said pixel electrode with said third interlayer insulating film interposed therebetween to form a storage capacitor and said second interlayer insulating film provides a leveled upper surface for said pixel electrode.

7. A display device according to claim 6 wherein said light shielding layer comprises titanium or chromium.

8. A display device according to claim 6 wherein said first interlayer insulating film comprises silicon oxide.

9. A display device accordingly to claim 6 wherein said thin film transistor has a top-gate structure in which said gate electrode is located over said channel region.

10. A display device according to claim 6 wherein said pixel electrode partially overlaps with said source line and said gate line.