DC removal circuit for digital signal

• US 5,778,028 A
• Filed: 12/08/1995
• Issued: 07/07/1998
• Est. Priority Date: 06/13/1994
• Status: Expired due to Term

• Current Assignee: LG Electronics, Inc. (LG Corporation)
• Original Assignee: Zenith Electronics Corporation (LG Corporation)
• Inventors: Turner, Rudolf
• Primary Examiner(s): VO, DON NGUYEN
• Application Number:
  US08/569,975
• Time in Patent Office: 942 Days
• Field of Search: 375/286, 375/292, 375/293, 375/229, 375/231, 375/316, 375/317, 375/319, 375/345, 327/307, 348/257, 348/677, 348/689, 341/126, 341/139, 341/155
• US Class Current: 375/229
• CPC Class Codes: H04L 25/064 Subtraction of the threshold from the signal, which is then compared to a supplementary fixed threshold

Abstract

A DC removal circuit for removing residual DC from a digitally encoded television signal including a plurality of multi level data symbols occurring at a constant symbol rate and formatted in repetitive data fields, each field including repetitive data segments having data segment sync of a fixed pattern of four symbols. A derived value of DC is subtracted from each of the received data symbols. The output of the subtractor is sampled, at the symbol rate or at one-half the symbol rate, and the sampled output is accumulated in an accumulator for generating the derived value. The sampling is continuous. The accumulator is preset to a zero value upon tuning to a different channel. An equalizer is supplied with the derived value of DC.

Claims

1. A method of removing DC from a digitally encoded input signal comprising a plurality of multi level data symbols received at a constant symbol rate comprising:

subtracting a derived value from each of the data symbols for removing the DC component of each encoded input signal and producing a subtracted signal output;

sampling said subtracted signal output at said symbol rate or at one-half said symbol rate; and

accumulating the samples for generating said derived value.

2. The method of claim 1 wherein said encoded input signal is a television channel and further comprising restarting said accumulating step from a preset value upon tuning to a different television channel.

3. The method of claim 2 wherein said encoded input signal includes a DC pilot and wherein said preset value equals zero.

4. The method of claim 1 wherein said encoded input signal includes segment sync having a fixed pattern of four symbols and wherein said sampling also samples said segment sync.

5. The method of claim 1 wherein said sampling is continuous throughout said subtracted signal.

6. A DC removal circuit comprising:

means for receiving a digitally encoded input signal comprising a plurality of multi level data symbols having a constant symbol rate and having levels above and below a zero value;

subtracting means for subtracting a derived value from each of said multi level data symbols for substantially removing the DC component of said encoded input signal;

means for sampling the output of said subtracting means at said symbol rate or at one-half said symbol rate; and

means for accumulating the samples for generating said derived value.

7. The circuit of claim 6 wherein said encoded input signal is a tuned television channel, and further including;

means for resetting said accumulating means upon tuning to a different television channel.

8. The circuit of claim 7 wherein said resetting means presets said accumulating means to a value of zero.

9. The circuit of claim 6 wherein said encoded input signal includes segment sync having a fixed pattern of four symbols and wherein said sampling means also samples said segment sync.

10. The circuit of claim 6 wherein said sampling means operates continuously on said output of said subtracting means.

11. A method of processing a digitally encoded input signal comprising a pilot and a plurality of multilevel data symbols received at a constant symbol rate, comprising:

sampling said encoded signal at a rate equal to or less than the symbol rate;

accumulating the samples for developing a DC signal representing said pilot; and

using said DC signal to equalize said input signal.

12. In combination:

an equalizer;

means for receiving a digitally encoded signal comprising a pilot and a plurality of constant rate multilevel data symbols;

means for sampling said encoded signal at a rate equal to or less than the symbol rate;

means for accumulating the samples for developing a DC signal representing said pilot; and

means for applying said DC signal to said equalizer.