Decompression of MPEG compressed data in a computer system
First Claim
1. A method in a computer system of decompressing data that has been subject to compression and the compressed data being in a set of predetermined data layers, the computer system including a host processor on a first integrated circuit chip connected via a peripheral bus to a secondary processor on a second integrated circuit chip, the method comprising the steps of:
- decompressing at least a system layer, which is a higher level layer than a video layer, of the compressed data in the host processor; and
decompressing other data layers of the set including the video layer in the secondary processor.
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Accused Products
Abstract
MPEG compressed data is decompressed in a computer system by sharing computational decompression tasks between the computer system host microprocessor, the graphics accelerator, and a dedicated MPEG processor in order to make best use of resources in the computer system. Thus the dedicated MPEG processor is of minimum capability and hence advantageously minimum cost. The host microprocessor is used to decompress the MPEG upper data layers. The more powerful the host microprocessor, the more upper data layers it decompresses. The remainder of the decompression (lower data layers) is performed by the MPEG dedicated processor and/or the graphics accelerator.
58 Citations
15 Claims
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1. A method in a computer system of decompressing data that has been subject to compression and the compressed data being in a set of predetermined data layers, the computer system including a host processor on a first integrated circuit chip connected via a peripheral bus to a secondary processor on a second integrated circuit chip, the method comprising the steps of:
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decompressing at least a system layer, which is a higher level layer than a video layer, of the compressed data in the host processor; and decompressing other data layers of the set including the video layer in the secondary processor. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer system adapted for decompression of compressed data which is in a set of predetermined data layers, comprising:
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a host processor on a first integrated circuit chip; a peripheral bus connected to the host processor; a secondary processor on a second integrated circuit chip and connected to the peripheral bus; and means for decompressing in the host processor at least a system layer, which is a higher level layer than a video layer, of the compressed data, wherein other data layers of the set including the video layer are decompressed in the secondary processor. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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Specification