Spurious signal reduction in RF transmitter integrated circuits
First Claim
Patent Images
1. A transmitter comprising:
- a carrier frequency node which presents a carrier frequency signal;
an intermediate frequency node which presents an intermediate frequency signal;
a modulator which modulates data onto said intermediate frequency signal;
a mixer which upconverts said modulated, intermediate frequency signal using said carrier frequency signal;
a first amplitude limiting stage inserted between said carrier frequency node and said mixer;
a second amplitude limiting stage inserted between said intermediate frequency node and said modulator; and
a filter inserted at an input of said second amplitude limiting stage and tuned to said intermediate frequency so as to reduce spurious signals transmitted by said transmitter,wherein said carrier frequency node, said intermediate frequency node, said modulator, said mixer, said first and second amplitude limiting stages and said filter are integrated onto a single integrated circuit chip, andwherein said spurious signals result from intermodulation between said intermediate frequency signal and interfering signals emanating from nodes of said integrated circuit chip.
0 Assignments
0 Petitions
Accused Products
Abstract
A method and system for reducing spurious signal content in transmitters is described. A lowpass or bandpass filter can be inserted after an input signal node of a transmitter to remove interfering signals generated, for example, from another input signal node of the transmitter. In this way integration of the transmitter circuitry is enhanced.
14 Citations
10 Claims
-
1. A transmitter comprising:
-
a carrier frequency node which presents a carrier frequency signal; an intermediate frequency node which presents an intermediate frequency signal; a modulator which modulates data onto said intermediate frequency signal; a mixer which upconverts said modulated, intermediate frequency signal using said carrier frequency signal; a first amplitude limiting stage inserted between said carrier frequency node and said mixer; a second amplitude limiting stage inserted between said intermediate frequency node and said modulator; and a filter inserted at an input of said second amplitude limiting stage and tuned to said intermediate frequency so as to reduce spurious signals transmitted by said transmitter, wherein said carrier frequency node, said intermediate frequency node, said modulator, said mixer, said first and second amplitude limiting stages and said filter are integrated onto a single integrated circuit chip, and wherein said spurious signals result from intermodulation between said intermediate frequency signal and interfering signals emanating from nodes of said integrated circuit chip. - View Dependent Claims (2, 3, 4, 5)
-
-
6. Transmitter circuitry comprising:
-
an integrated circuit chip having a radio frequency input and an intermediate frequency input; an amplitude limiting stage fabricated on said integrated circuit chip and disposed downstream of at least one of said radio frequency input and said intermediate frequency input; and a filter fabricated on said integrated circuit chip which filters one of said radio frequency input and said intermediate frequency input upstream of said amplitude limiting stage, wherein said filter is positioned at an input of said amplitude limiting stage so as to reduce spurious signals transmitted by said transmitter circuitry, said spurious signals resulting from intermodulation between interfering signals emanating from nodes of said integrated circuit chip. - View Dependent Claims (7, 8, 9, 10)
-
Specification