Semiconductor device and method of manufacturing the same

• US 5,783,466 A
• Filed: 03/20/1997
• Issued: 07/21/1998
• Est. Priority Date: 10/25/1993
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation), Toshiba Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Dousen, Noriaki, Sato, Nobuyuki, Takahashi, Wataru
• Primary Examiner(s): Niebling, John
• Assistant Examiner(s): Turner, Kevin F.
• Application Number:
  US08/821,385
• Time in Patent Office: 488 Days
• Field of Search: 257/717, 257/772, 257/753, 438/122, 438/413, 438/123
• US Class Current: 438/122
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/16 Fillings or auxiliary members in containers or encapsulations, e.g. centering rings H01L23/42, H01L23/552 take precedence
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15747 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19043 : being a resistor

Abstract

A semiconductor device according to the present invention includes a substrate made of an electrically insulative material having a relatively high thermal conductivity, a metallic pattern member provided on one major surface of the substrate and having an external terminal portion extending from the substrate, a semiconductor element mounted on the metallic pattern member, a metallic layer provided on the other major surface of the substrate, a heat dissipation plate fixed onto the metallic layer, and a mold body for coating both the substrate mounted with the semiconductor element and the heat dissipation plate so as to expose the external terminal portion. A method for manufacturing a semiconductor device according to the present invention includes a step of mounting a semiconductor element on a metallic pattern member provided on one major surface of a substrate made of an electrically insulative material having a relatively high thermal conductivity, the substrate having a metallic layer on the other major surface thereof, a step of fixing a heat dissipation plate onto the metallic layer, and a step of coating both the substrate mounted with the semiconductor element and the heat dissipation plate with an insulative material so as to expose the external terminal portion.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

mounting a semiconductor element on a metallic pattern member fixed onto one major surface of a substrate by an alloy layer interposed between the pattern member and the substrate, said alloy layer composed of material constituting the pattern member and the substrate, said metallic pattern member configured to have an external terminal portion extending from said substrate substantially parallel with said one major surface of said substrate, and said substrate made of an electrically insulative material having a relatively high thermal conductivity;

fixing a metallic layer onto another major surface of said substrate by an alloy layer interposed between the metallic layer and the substrate, said alloy layer composed of material constituting the metallic layer and the substrate;

fixing a heat dissipation plate onto said metallic layer; and

coating both said substrate mounted with said semiconductor element and said heat dissipation plate with an insulative material so as to expose the external terminal portion.

2. The method according to claim 1, wherein said metallic pattern member has a distal end connected to the external terminal portion.

3. The method according to claim 1, wherein said semiconductor element is mounted on said metallic pattern member by die bonding and wire bonding.

4. The method according to claim 1, wherein said heat dissipation plate is fixed onto said metallic layer by heat treatment using a brazing filler.

5. The method according to claim 1, wherein said substrate mounted with said semiconductor element, and said heat dissipation plate are coated with an insulative material by transfer molding.

6. The method according to claim 5, wherein said insulative material is epoxy resin or silicone resin.