Method of forming a truck MOS gate or a power semiconductor device

• US 5,783,491 A
• Filed: 02/02/1995
• Issued: 07/21/1998
• Est. Priority Date: 02/04/1994
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Nakamura, Katsumi, Shiozawa, Katsuomi, Minato, Tadaharu, Tominaga, Shuuichi
• Primary Examiner(s): DUTTON, BRIAN KEITH
• Application Number:
  US08/382,581
• Time in Patent Office: 1,265 Days
• Field of Search: 437/203, 437/67, 437/90, 437/947, 437/927, 437/21, 437/78, 438/404, 438/386, 438/700, 438/702
• US Class Current: 438/702
• CPC Class Codes: H01L 21/76232 of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls H01L21/76229 takes precedence
• CPC Class Codes: H01L 21/76264 SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
• CPC Class Codes: H01L 21/76286 Lateral isolation by refilling of trenches with polycristalline material
• CPC Class Codes: H01L 21/763 Polycrystalline semiconductor regions H01L21/76264 takes precedence
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/66325 controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/66356 Gated diodes, e.g. field controlled diodes [FCD], static induction thyristors [SITh], field controlled thyristors [FCTh]
• CPC Class Codes: H01L 29/66378 the other device being a controlling field-effect device
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7391 Gated diode structures
• CPC Class Codes: H01L 29/7394 on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate H01L29/7398 takes precedence
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/7455 produced by an insulated gate structure
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/7801 DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region lateral high-voltage MISFETs with channel well and drain offset region H01L29/7835
• CPC Class Codes: H01L 29/7813 : with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7824 : with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
• CPC Class Codes: H01L 29/7827 : Vertical transistors H01L29/7802, H01L29/78642 take precedence

Abstract

A method of fabricating a semiconductor device which includes the steps of forming a trench (4), and repeating the formation and removal of an oxide film (a sacrificial oxide film) twice to provide a rounded configuration (5b) of an opening portion of the trench (4) and a rounded configuration (6b) of a bottom thereof and to draw defects in a semiconductor layer into a silicon oxide film (8), reducing the defects adjacent the inner wall of the trench (4), whereby electric field concentration on a gate is prevented and the mobility of carriers in channels is improved for an improvement in characteristic, particularly an on-state voltage, of a power device.

Claims

1. A method of fabricating a semiconductor device, comprising the steps of:

(a) anisotropically etching a semiconductor substrate to form a trench extending in a direction of the thickness of said substrate;

(b) performing a first thermal oxidation to form a first sacrificial oxide film in said trench;

(c) removing said first sacrificial oxide film;

(d) performing a second thermal oxidation to form a second sacrificial oxide film in said trench after said step (c);

(e) removing said second sacrificial oxide film;

(f) forming an insulating film comprising a part of a control electrode in said trench after said step (e); and

(g) filling said trench to form said control electrode opposed to said substrate through said insulating film comprising said part of said control electrode.

2. The method of claim 1, wherein

said second thermal oxidation is performed in a water-containing atmosphere, and

said first thermal oxidation is performed at a first temperature higher than a second temperature at which said second thermal oxidation is performed.

3. The method of claim 2, wherein

said first temperature is not less than 1000°

C.

4. A method of fabricating a semiconductor device, comprising the steps of:

(a) anisotropically etching a semiconductor substrate to form a trench having an aspect ratio of from 2 to 30 and extending in a direction of the thickness of said substrate;

(b) performing a thermal oxidation in an atmosphere of oxygen at a temperature not less than 1000°

C. to form in said trench a sacrificial oxide film having a thickness one-tenth to three-tenths the size of an opening portion of said trench;

(c) removing said sacrificial oxide film;

(d) forming an insulating film comprising a part of a control electrode in said trench after said step (c); and

(e) filling said trench to form said control electrode opposed to said substrate through said insulating film comprising said part of said control electrode.

5. A method of fabricating a semiconductor device, comprising the steps of:

(a) providing a semiconductor substrate on a surface having an insulating property;

(b) anisotropically etching said semiconductor substrate to form a trench extending in a direction of the thickness of said semiconductor substrate;

(c) removing a distance of a part of said surface having an insulating property on said substrate which lies under said trench to form a recess having a diameter greater than a diameter of said trench;

(d) performing an isotropic dry etching on said semiconductor substrate to remove the recess;

(e) oxidizing an inside of said trench in an atmosphere of steam at a temperature not more than 1000°

C. to form an isolation oxide film after said step (d); and

(f) filling said trench with a burying material;

wherein said distance is 100 to 400 nm.

6. A method of fabricating a semiconductor device, comprising the steps of:

(a) providing a semiconductor substrate on a surface having an insulating property;

(b) anisotropically etching said semiconductor substrate to form a trench extending in a direction of the thickness of said semiconductor substrate;

(c) removing a distance of a part of said surface having an insulating property on said substrate which lies under said trench to form a recess having a diameter greater than a diameter of said trench;

(d) performing an isotropic dry etching on said semiconductor substrate to remove the recess;

(e) oxidizing an inside of said trench in an atmosphere of steam at a temperature not more than 1000°

C. to form an isolation oxide film after said step (d); and

(f) filling said trench with a burying material;

wherein said isotropic dry etching is performed by using an O₂ /CF₄ based gas, and a ratio R=O₂ /CF₄ of the gas satisfies 1<

R<

5.

7. A method of fabricating a semiconductor device, comprising the steps of:

(a) anisotropically etching a semiconductor substrate made of semiconductor to form a trench extending in a direction of the thickness of said substrate;

(b) providing on said substrate a mask having an edge backing away a distance from an opening portion of said trench;

(c) performing an isotropic dry etching on said substrate by using said mask to form an oxide based film in a bottom of said trench;

(d) removing said oxide based film;

(e) oxidizing an inside of said trench in an atmosphere of steam at a temperature not more than 1000°

C. after said step (d); and

(f) filling said trench to form a control electrode opposed to said substrate through said insulating film comprising a part of said control electrode.

8. The method of claim 7, wherein

said distance is 100 to 400 nm.

9. The method of claim 7, wherein

said isotropic dry etching is performed by using an O₂ /CF₄ based gas, and a ratio R=O₂ /CF₄ of the gas satisfies 1<

R<

5.

10. The method of claim 7, further comprising the steps of:

(g) performing a thermal oxidation to form a sacrificial oxide film in said trench; and

(h) removing said sacrificial oxide film, said steps (g) and (h) being performed after said step (d) and before said step (e).

11. The method of claim 10, wherein

said thermal oxidation in said step (f) is performed in an atmosphere of oxygen at a temperature ranging from 950°

to 1100°

C.

12. A method of fabricating a semiconductor device, comprising the steps of:

(a)(1) providing a semiconductor substrate on a surface having an insulating property;

(b) anisotropically etching said semiconductor substrate to form a trench extending in a direction of the thickness of said semiconductor substrate;

(c) performing a thermal oxidation to form a sacrificial oxide film in said trench;

(d) removing a part of said substrate which lies under said trench and said sacrificial oxide film;

(e) forming a polycrystalline semiconductor layer on an inner wall of said trench;

(f) oxidizing said polycrystalline semiconductor layer to form an isolation oxide film; and

(g) filling said trench with a burying material.

13. A method of fabricating a semiconductor device, comprising the steps of:

(a)(1) providing a semiconductor substrate on a surface having an insulating property;

(b) anisotropically etching said semiconductor substrate to form a trench extending in a direction of the thickness of said semiconductor substrate;

(c) performing a thermal oxidation in an atmosphere of oxygen at a temperature not less than 1000°

C. to form in said trench a sacrificial oxide film having a thickness one-tenth to three-tenths the size of an opening portion of said trench;

(d) removing said sacrificial oxide film;

(e) forming an isolation oxide film in said trench after step (c); and

(f) filling said trench with a burying material.