Optical semiconductor device

• US 5,783,844 A
• Filed: 09/27/1995
• Issued: 07/21/1998
• Est. Priority Date: 09/28/1994
• Status: Expired due to Fees

• Current Assignee: Nippon Telegraph and Telephone Corporation
• Original Assignee: Nippon Telegraph and Telephone Corporation
• Inventors: Miyazawa, Takeo, Kobayashi, Fumihiko, Mori, Hidefumi, Nakano, Jun-ichi
• Primary Examiner(s): Jackson, Jerome
• Assistant Examiner(s): KELLEY, NATHAN K
• Application Number:
  US08/534,333
• Time in Patent Office: 1,028 Days
• Field of Search: 372/45, 372/49, 372/50, 372/48, 385/131, 385/132, 257/103, 257/79
• US Class Current: 257/103
• CPC Class Codes: G02B 2006/12121 Laser
• CPC Class Codes: G02B 2006/12123 Diode
• CPC Class Codes: G02B 2006/12147 Coupler
• CPC Class Codes: G02B 2006/1215 Splitter
• CPC Class Codes: G02B 2006/12159 Interferometer
• CPC Class Codes: G02B 2006/12176 Etching
• CPC Class Codes: G02B 2006/12178 Epitaxial growth
• CPC Class Codes: G02B 6/125 Bends, branchings or intersections
• CPC Class Codes: G02F 1/025 in an optical waveguide structure G02F1/017, G02F1/2257 take precedence
• CPC Class Codes: G02F 1/2257 the optical waveguides being made of semiconducting material
• CPC Class Codes: H01L 27/15 including semiconductor components having potential barriers, specially adapted for light emission
• CPC Class Codes: H01L 33/0062 for devices with an active region comprising only III-V compounds
• CPC Class Codes: H01S 2301/176 Specific passivation layers on surfaces other than the emission facet
• CPC Class Codes: H01S 5/026 Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06
• CPC Class Codes: H01S 5/0265 Intensity modulators intra-cavity modulators H01S5/0625
• CPC Class Codes: H01S 5/04254 characterised by the shape
• CPC Class Codes: H01S 5/04256 characterised by the configuration
• CPC Class Codes: H01S 5/0609 acting on an absorbing region, e.g. wavelength convertors
• CPC Class Codes: H01S 5/065 Mode locking; Mode suppression; Mode selection ; Self pulsating
• CPC Class Codes: H01S 5/10 Construction or shape of the optical resonator , e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region H01S5/20 takes precedence
• CPC Class Codes: H01S 5/183 : having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
• CPC Class Codes: H01S 5/18347 : Mesa comprising active layer
• CPC Class Codes: H01S 5/1835 : Non-circular mesa
• CPC Class Codes: H01S 5/2201 : in a specific crystallographic orientation
• CPC Class Codes: H01S 5/2224 : semi-insulating semiconductors
• CPC Class Codes: H01S 5/227 : Buried mesa structure ; Striped active layer
• CPC Class Codes: H01S 5/2275 : mesa created by etching
• CPC Class Codes: H01S 5/2277 : double channel planar buried heterostructure [DCPBH] laser
• CPC Class Codes: H01S 5/3202 : grown on specifically orientated substrates, or using orientation dependent growth
• CPC Class Codes: H01S 5/4056 : emitting light in more than one direction
• CPC Class Codes: H01S 5/423 : having a vertical cavity
• CPC Class Codes: H01S 5/50 : Amplifier structures not provided for in groups H01S5/02 - H01S5/30

Abstract

An optical semiconductor device includes an optical semiconductor element, a semiconductor region, and a buried layer. The optical semiconductor element is formed on a semiconductor substrate. The semiconductor region opposes the optical semiconductor element and essentially surrounds the optical semiconductor element to form walls. The buried layer is arranged between the walls of the semiconductor region and the optical semiconductor element and formed by vapor phase epitaxy. In this optical semiconductor device, a distance between the wall of the semiconductor region and a side wall of the optical semiconductor element is larger in a portion in which the growth rate of the vapor phase epitaxy in a horizontal direction from the side wall of the optical semiconductor element and the wall of the semiconductor region is higher.

Claims

1. An optical semiconductor device comprising:

a semiconductor substrate;

an optical semiconductor element formed on a portion of said semiconductor substrate, said optical semiconductor element having a thickness defined by opposing sidewalls;

a semiconductor layer having a semi-insulating layer embedded therein and opposing said optical semiconductor element and a first area adjacent said sidewall portions of said optical semiconductor element, said first area having a trench formed therein, said trench having opposing sidewalls; and

a filling-up layer formed in said trench by vapor phase epitaxy,

wherein a first distance between a first pair of opposing trench sidewalls is larger than a second distance between a second pair of opposing trench sidewalls, such that said epitaxial growth of said semi-insulating layer is greater along said first pair of opposing trench sidewalls.

2. A device according to claim 1, wherein

said optical semiconductor element has a stacked structure of Group III-V compound semiconductor layers made from In, Ga, Al, P, and As, and

said filling-up layer is made from semi-insulating InP.

3. A device according to claim 1, wherein said optical semiconductor element is a multilayered structure.

4. A device according to claim 1, wherein

said device further comprises an electrode connected to said optical semiconductor element,

said electrode is formed on said semiconductor region via an insulating layer, and

a pair of trenches are formed in a portion of said semiconductor region below said electrode and within said filling-up layer.

5. A device according to claim 4, wherein each of said pair of trenches has opposing sidewalls and wherein a first distance between a first pair of opposing sidewalls each of said pair of trenches is greater than a second distance between a second pair of opposing sidewalls of each of said pair of trenches.

6. A device according to claim 4, wherein

said optical semiconductor element has a stacked structure of Group III-V compound semiconductor layers made form In, Ga, Al, P, and As, and

said filling-up layer is made from semi-insulating InP.

7. A device according to claim 4, wherein said buried layer has a multilayered structure.