Liquid crystal display device and method for driving the same

• US 5,784,042 A
• Filed: 01/05/1995
• Issued: 07/21/1998
• Est. Priority Date: 03/19/1991
• Status: Expired due to Term

• Current Assignee: Panasonic Liquid Crystal Display Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Hitachi, Ltd.
• Inventors: Konishi, Nobutake, Ono, Kikuo
• Primary Examiner(s): Hjerpe, Richard
• Assistant Examiner(s): LAO, LUNYI
• Application Number:
  US08/369,266
• Time in Patent Office: 1,293 Days
• Field of Search: 345/94, 345/95, 345/96, 345/97, 345/53, 345/92, 345/208, 345/209, 345/210, 345/87, 359/55, 359/59, 359/56, 349/42, 349/43, 349/48
• US Class Current: 345/94
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2310/06 Details of flat display driving waveforms
• CPC Class Codes: G09G 2330/08 Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
• CPC Class Codes: G09G 3/2025 the sub-frames having all the same time duration
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

An active matrix liquid crystal display device having a redundancy structure implemented by forming loops of drain lines by connecting two or more abutted drain lines, and providing sampling transistors on both sides of the display panel thereof or the like, so as to be able to deal with short circuits in drain lines and defects in driving TFTs occurring during manufacture, thereby providing an improved quality of display which will not deteriorate even if defects occur, thus preventing the loss of function in a display device. The drive signals for the sampling transistors which control signals to be applied to respective drain lines in a drive circuit for driving liquid crystal elements are reversed in polarity for every frame in order to suppress the occurrence of flicker or the like in the display screen so as to attain a clean, clear and high-quality screen display.

Claims

1. A method for driving a liquid crystal display device, the liquid crystal display device including

a liquid crystal pixel, and

a thin film transistor having a source, a drain, and a gate, the source of the thin film transistor being coupled to the liquid crystal pixel,

the method comprising the steps of:

applying a drain voltage indicative of a video signal to the drain of the thin film transistor, the drain voltage having a first drain voltage value at a first time;

applying a gate voltage pulse to the gate of the thin film transistor, the gate voltage pulse being a gate voltage which changes from a first gate voltage value to a second gate voltage value at a second time after the first time, and changes from the second gate voltage value to the first gate voltage value at a third time after the second time, the first gate voltage value being effective for turning the thin film transistor off, the second gate voltage value being effective for turning the thin film transistor on; and

changing the drain voltage from the first drain voltage value to a second drain voltage value at one of a fourth time and a fifth time, the fifth time being after the fourth time, the fourth time and the fifth time each being not before the second time and not after than the third time, the first drain voltage value and the second drain voltage value each being between the first gate voltage value and the second gate voltage value;

wherein the drain voltage is changed from the first drain voltage value to the second drain voltage value at the fourth time if a difference between the second gate voltage value and the second drain voltage value is less than a difference between the second gate voltage value and the first drain voltage value, and is changed from the first drain voltage value to the second drain voltage value at the fifth time if the difference between the second gate voltage value and the second drain voltage value is greater than the difference between the second gate voltage value and the first drain voltage value.

2. A method for driving a liquid crystal display device, the liquid crystal display device including

a liquid crystal pixel, and

a thin film transistor having a source, a drain, and a gate, the source of the thin film transistor being coupled to the liquid crystal pixel,

the method comprising the steps of:

applying a drain voltage indicative of a video signal to the drain of the thin film transistor, the drain voltage having a first drain voltage value at a first time;

applying a gate voltage pulse to the gate of the thin film transistor, the gate voltage pulse being a gate voltage which changes from a first gate voltage value to one of a second gate voltage value and a third gate voltage value at a second time after the first time, and changes from the one of the second gate voltage value and the third gate voltage value to the first gate voltage value at a third time after the second time, the first gate voltage value being effective for turning the thin film transistor off, the second gate voltage value and the third gate voltage value each being effective for turning the thin film transistor on, the second gate voltage value being between the first gate voltage value and the third gate voltage value; and

changing the drain voltage from the first drain voltage value to a second drain voltage value at a fourth time, the fourth time being not before the second time and not after than the third time, the first drain voltage value and the second drain voltage value each being between the first gate voltage value and the second gate voltage value;

wherein the gate voltage changes from the first gate voltage value to the second gate voltage value at the second time in a first frame and changes from the second gate voltage value to the first gate voltage value at the third time in the first frame if the second drain voltage value is closer to the first gate voltage value than is the first drain voltage value, and changes from the first gate voltage value to the third gate voltage value at the second time in a second frame and changes from the third gate voltage value to the first gate voltage value at the third time in the second frame if the second drain voltage value is further away from the first gate voltage value than is the first drain voltage value.

3. A method for driving a liquid crystal display device, the liquid crystal display device including

a liquid crystal pixel, and

a thin film transistor having a source, a drain, and a gate, the source of the thin film transistor being coupled to the liquid crystal pixel,

the method comprising the steps of:

applying a drain voltage indicative of a video signal to the drain of the thin film transistor, the drain voltage having a first drain voltage value at a first time;

applying a gate voltage pulse to the gate of the thin film transistor, the gate voltage pulse being a gate voltage which changes from a first gate voltage value to a second gate voltage value at a second time after the first time, and changes from the second gate voltage value to the first gate voltage value at a third time after the second time, the first gate voltage value being effective for turning the thin film transistor off, the second gate voltage value being effective for turning the thin film transistor on; and

changing the drain voltage from the first drain voltage value to a second drain voltage value at one of a fourth time and a fifth time, the fifth time being after the fourth time, the fourth time and the fifth time each being not before the second time and not after than the third time, one of the first drain voltage value and the second drain voltage value being between the first gate voltage value and a reference voltage value, another one of the first drain voltage value and the second drain voltage value being between the reference voltage value and the second gate voltage value, the reference voltage value being between the first gate voltage value and the second gate voltage value;

wherein the drain voltage is changed from the first drain voltage value to the second drain voltage value at the fourth time if the first drain voltage value is between the first gate voltage value and the reference voltage value and the second drain voltage value is between the reference voltage value and the second gate voltage value, and is changed from the first drain voltage value to the second drain voltage value at the fifth time if the first drain voltage value is between the reference voltage value and the second gate voltage value and the second drain voltage value is between the first gate voltage value and the reference voltage value.

4. A method according to claim 3 wherein the reference voltage value is halfway between a maximum voltage value the drain voltage can have and a minimum voltage value the drain voltage can have.

5. A method for driving a liquid crystal display device, the liquid crystal display device including

a liquid crystal pixel, and

a thin film transistor having a source, a drain, and a gate, the source of the thin film transistor being coupled to the liquid crystal pixel,

the method comprising the steps of:

applying a drain voltage indicative of a video signal to the drain of the thin film transistor, the drain voltage having a first drain voltage value at a first time;

applying a gate voltage pulse to the gate of the thin film transistor, the gate voltage pulse being a gate voltage which changes from a first gate voltage value to one of a second gate voltage value and a third gate voltage value at a second time after the first time, and changes from the one of the second gate voltage value and the third gate voltage value to the first gate voltage value at a third time after the second time, the first gate voltage value being effective for turning the thin film transistor off, the second gate voltage value and the third gate voltage value each being effective for turning the thin film transistor on, the second gate voltage value being between the first gate voltage value and the third gate voltage value; and

changing the drain voltage from the first drain voltage value to a second drain voltage value at a fourth time, the fourth time being not before the second time and not after than the third time, one of the first drain voltage value and the second drain voltage value being between the first gate voltage value and a reference voltage value, another one of the first drain voltage value and the second drain voltage value being between the reference voltage value and the second gate voltage value, the reference voltage value being between the first gate voltage value and the second gate voltage value;

wherein the gate voltage changes from the first gate voltage value to the second gate voltage value at the second time and changes from the second gate voltage value to the first gate voltage value at the third time if the first drain voltage value is between the reference voltage value and the second gate voltage value and the second drain voltage value is between the first gate voltage value and the reference voltage value, and changes from the first gate voltage value to the third gate voltage value at the second time and changes from the third gate voltage value to the first gate voltage value at the third time if the first drain voltage value is between the first gate voltage value and the reference voltage value and the second drain voltage value is between the reference voltage value and the second gate voltage value.

6. A liquid crystal display comprising:

a plurality of liquid crystal pixels arranged in rows and columns to form a matrix;

a plurality of thin film transistors, each of the transistors having a source, a drain, and a gate, the source of each of the thin film transistors being coupled to a respective one of the liquid crystal pixels;

drain driving means for applying a drain voltage indicative of a video signal to the drain of each of the thin film transistors, the drain voltage having a first drain voltage value at a first time; and

gate driving means for applying a gate voltage pulse to the gate of each of the thin film transistors, the gate voltage pulse being a gate voltage which changes from a first gate voltage value to a second gate voltage value at a second time after the first time, and changes from the second gate voltage value to the first gate voltage value at a third time after the second time, the first gate voltage value being effective for turning the thin film transistors off, the second gate voltage value being effective for turning the thin film transistors on;

wherein the drain driving means changes the drain voltage from the first drain voltage value to a second drain voltage value at one of a fourth time and a fifth time, the fifth time being after the fourth time, the fourth time and the fifth time each being not before the second time and not after than the third time, the first drain voltage value and the second drain voltage value each being between the first gate voltage value and the second gate voltage value; and

wherein the drain driving means changes the drain voltage from the first drain voltage value to the second drain voltage value at the fourth time if a difference between the second gate voltage value and the second drain voltage value is less than a difference between the second gate voltage value and the first drain voltage value, and changes the drain voltage from the first drain voltage value to the second drain voltage value at the fifth time if the difference between the second gate voltage value and the second drain voltage value is greater than the difference between the second gate voltage value and the first drain voltage value.

7. An information processing apparatus comprising:

a liquid crystal display;

wherein the liquid crystal display includes;

a plurality of liquid crystal pixels arranged in rows and columns to form a matrix;

a plurality of thin film transistors, each of the transistors having a source, a drain, and a gate, the source of each of the thin film transistors being coupled to a respective one of the liquid crystal pixels;

drain driving means for applying a drain voltage indicative of a video signal to the drain of each of the thin film transistors, the drain voltage having a first drain voltage value at a first time; and

gate driving means for applying a gate voltage pulse to the gate of each of the thin film transistors, the gate voltage pulse being a gate voltage which changes from a first gate voltage value to a second gate voltage value at a second time after the first time, and changes from the second gate voltage value to the first gate voltage value at a third time after the second time, the first gate voltage value being effective for turning the thin film transistors off, the second gate voltage value being effective for turning the thin film transistors on;

wherein the drain driving means changes the drain voltage from the first drain voltage value to a second drain voltage value at one of a fourth time and a fifth time, the fifth time being after the fourth time, the fourth time and the fifth time each being not before the second time and not after than the third time, the first drain voltage value and the second drain voltage value each being between the first gate voltage value and the second gate voltage value; and

wherein the drain driving means changes the drain voltage from the first drain voltage value to the second drain voltage value at the fourth time if a difference between the second gate voltage value and the second drain voltage value is less than a difference between the second gate voltage value and the first drain voltage value, and changes the drain voltage from the first drain voltage value to the second drain voltage value at the fifth time if the difference between the second gate voltage value and the second drain voltage value is greater than the difference between the second gate voltage value and the first drain voltage value.

8. A method for driving a liquid crystal display device, the liquid crystal display device including

a liquid crystal pixel, and

a thin film transistor having a source, a drain, and a gate, the source of the thin film transistor being coupled to the liquid crystal pixel,

the method comprising the steps of:

applying a gate voltage pulse to the gate of the thin film transistor to turn the thin film transistor on for a period of time in each of a first frame and a second frame immediately following the first frame, the gate voltage pulse being a gate voltage which changes from a gate-off voltage value effective for turning the thin film transistor off to a gate-on voltage value effective for turning the thin film transistor on, remains at the gate-on voltage value for a predetermined pulse time, and then changes from the gate-on voltage value to the gate-off voltage value; and

applying a drain voltage indicative of a video signal to the drain of the thin film transistor, the drain voltage changing to a first drain voltage value at a time during the gate voltage pulse in the first frame and remaining at the first drain voltage value until at least an end of the gate voltage pulse in the first frame such that the first drain voltage value overlaps the gate voltage pulse in the first frame for a first overlap time, and changing to a second drain voltage value at a time during the gate voltage pulse in the second frame and remaining at the second drain voltage value until at least an end of the gate voltage pulse in the second frame such that the second drain voltage value overlaps the gate voltage pulse in the second frame for a second overlap time;

wherein the second overlap time is greater than the first overlap time if a difference between the gate-on voltage value and the second drain voltage value is less than a difference between the gate-on voltage value and the first drain voltage value, and is less than the first overlap time if the difference between the gate-on voltage value and the second drain voltage value is greater than the difference between the gate-on voltage value and the first drain voltage value.

9. A method for driving a liquid crystal display device, the liquid crystal display device including

a liquid crystal pixel, and

a thin film transistor having a source, a drain, and a gate, the source of the thin film transistor being coupled to the liquid crystal pixel,

the method comprising the steps of:

applying a gate voltage pulse to the gate of the thin film transistor to turn the thin film transistor on for a period of time in each of one frame and another frame immediately adjacent to the one frame, the gate voltage pulse being a gate voltage which changes from a gate-off voltage value effective for turning the thin film transistor off to a gate-on voltage value effective for turning the thin film transistor on, remains at the gate-on voltage value for a predetermined pulse time, and then changes from the gate-on voltage value to the gate-off voltage value, the gate-on voltage value in the other frame being different from the gate-on voltage value in the one frame; and

applying a drain voltage indicative of a video signal to the drain of the thin film transistor, the drain voltage changing to a first drain voltage value at a time during the gate voltage pulse in the one frame and remaining at the first drain voltage value until at least an end of the gate voltage pulse in the one frame, and changing to a second drain voltage value at a time during the gate voltage pulse in the other frame and remaining at the second drain voltage value until at least an end of the gate voltage pulse in the other frame;

wherein the gate-on voltage value in the other frame is greater than the gate-on voltage value in the one frame if the second drain voltage value is greater than the first drain voltage value, or the gate-on voltage value in the one frame is less than the gate-on voltage value in the other frame if the first drain voltage value is less than the second drain voltage value.

10. A method according to claim 9 wherein the drain voltage changes to the first drain voltage value at a time during the gate voltage pulse in the one frame which is a predetermined period of time before the end of the gate voltage pulse in the one frame and remains at the first drain voltage value until at least the end of the gate voltage pulse in the one frame such that the first drain voltage value overlaps the gate voltage pulse in the one frame for a predetermined overlap time equal to the predetermined period of time, and changes to the second drain voltage value at a time during the gate voltage pulse in the other frame which is the predetermined period of time before the end of the gate voltage pulse in the other frame and remains at the second drain voltage value until at least the end of the gate voltage pulse in the other frame such that the second drain voltage value overlaps the gate voltage pulse in the other frame for the predetermined overlap time.

11. A method for driving a liquid crystal display device, the liquid crystal display device including

a liquid crystal pixel, and

a thin film transistor having a source, a drain, and a gate, the source of the thin film transistor being coupled to the liquid crystal pixel,

the method comprising the steps of:

applying a gate voltage pulse to the gate of the thin film transistor to turn the thin film transistor on for a period of time in each of a first frame and a second frame immediately following the first frame, the gate voltage pulse being a gate voltage which changes from a gate-off voltage value effective for turning the thin film transistor off to a gate-on voltage value effective for turning the thin film transistor on, remains at the gate-on voltage value for a predetermined pulse time, and then changes from the gate-on voltage value to the gate-off voltage value; and

applying a drain voltage indicative of a video signal to the drain of the thin film transistor, the drain voltage changing to a first drain voltage value at a time during the gate voltage pulse in the first frame and remaining at the first drain voltage value until at least an end of the gate voltage pulse in the first frame such that the first drain voltage value overlaps the gate voltage pulse in the first frame for a first overlap time, and changing to a second drain voltage value at a time during the gate voltage pulse in the second frame and remaining at the second drain voltage value until at least an end of the gate voltage pulse in the second frame such that the second drain voltage value overlaps the gate voltage pulse in the second frame for a second overlap time, one of the first drain voltage value and the second drain voltage value being between the gate-off voltage value and a reference voltage value, another one of the first drain voltage value and the second drain voltage value being between the reference voltage value and the gate-on voltage value, the reference voltage value being between the gate-off voltage value and the gate-on voltage value;

wherein the second overlap time is greater than the first overlap time if the first drain voltage value is between the gate-off voltage value and the reference voltage value and the second drain voltage value is between the reference voltage value and the gate-on voltage value, and is less than the first overlap time if the first drain voltage value is between the reference voltage value and the gate-on voltage value and the second drain voltage value is between the gate-off voltage value and the reference voltage value.

12. A method according to claim 11 wherein the reference voltage value is halfway between a maximum voltage value the drain voltage can have and a minimum voltage value the drain voltage can have.

13. A method for driving a liquid crystal display device, the liquid crystal display device including

a liquid crystal pixel, and

a thin film transistor having a source, a drain, and a gate, the source of the thin film transistor being coupled to the liquid crystal pixel,

the method comprising the steps of:

applying a gate voltage pulse to the gate of the thin film transistor to turn the thin film transistor on for a period of time in each of one frame and another frame immediately adjacent to the one frame, the gate voltage pulse being a gate voltage which changes from a gate-off voltage value effective for turning the thin film transistor off to a gate-on voltage value effective for turning the thin film transistor on, remains at the gate-on voltage value for a predetermined pulse time, and then changes from the gate-on voltage value to the gate-off voltage value, the gate-on voltage value in the other frame being different from the gate-on voltage value in the one frame; and

applying a drain voltage indicative of a video signal to the drain of the thin film transistor, the drain voltage changing to a first drain voltage value at a time during the gate voltage pulse in the one frame and remaining at the first drain voltage value until at least an end of the gate voltage pulse in the one frame, and changing to a second drain voltage value at a time during the gate voltage pulse in the other frame and remaining at the second drain voltage value until at least an end of the gate voltage pulse in the other frame, one of the first drain voltage value and the second drain voltage value being between the gate-off voltage value and a reference voltage value, another one of the first drain voltage value and the second drain voltage value being between the reference voltage value and the gate-on voltage value, the reference voltage value being between the gate-off voltage value and the gate-on voltage value;

wherein the gate-on voltage value in the other frame is greater than the gate-on voltage value in the one frame if the first drain voltage value is between the gate-off voltage value and the reference voltage value and the second drain voltage value is between the reference voltage value and the gate-on voltage value, or the gate-on voltage value in the one frame is less than the gate-on voltage value in the other frame if the second drain voltage value is between the reference voltage value and the gate-on voltage value and the first drain voltage value is between the gate-off voltage value and the reference voltage value.

14. A liquid crystal display comprising:

a plurality of liquid crystal pixels arranged in rows and columns to form a matrix;

a plurality of thin film transistors, each of the transistors having a source, a drain, and a gate, the source of each of the thin film transistors being coupled to a respective one of the liquid crystal pixels;

gate driving means for applying a gate voltage pulse to the gate of each of the thin film transistors to turn the thin film transistors on for a period of time in each of a first frame and a second frame immediately following the first frame, the gate voltage pulse being a gate voltage which changes from a gate-off voltage value effective for turning the thin film transistors off to a gate-on voltage value effective for turning the thin film transistors on, remains at the gate-on voltage value for a predetermined pulse time, and then changes from the gate-on voltage value to the gate-off voltage value; and

drain driving means for applying a drain voltage indicative of a video signal to the drain of each of the thin film transistors, the drain voltage changing to a first drain voltage value at a time during the gate voltage pulse in the first frame and remaining at the first drain voltage value until at least an end of the gate voltage pulse in the first frame such that the first drain voltage value overlaps the gate voltage pulse in the first frame for a first overlap time, and changing to a second drain voltage value at a time during the gate voltage pulse in the second frame and remaining at the second drain voltage value until at least an end of the gate voltage pulse in the second frame such that the second drain voltage value overlaps the gate voltage pulse in the second frame for a second overlap time;

wherein the second overlap time is greater than the first overlap time if a difference between the gate-on voltage value and the second drain voltage value is less than a difference between the gate-on voltage value and the first drain voltage value, and is less than the first overlap time if the difference between the gate-on voltage value and the second drain voltage value is greater than the difference between the gate-on voltage value and the first drain voltage value.

15. An information processing apparatus comprising:

a liquid crystal display;

wherein the liquid crystal display includes;

a plurality of liquid crystal pixels arranged in rows and columns to form a matrix;

a plurality of thin film transistors, each of the transistors having a source, a drain, and a gate, the source of each of the thin film transistors being coupled to a respective one of the liquid crystal pixels;

gate driving means for applying a gate voltage pulse to the gate of each of the thin film transistors to turn the thin film transistors on for a period of time in each of a first frame and a second frame immediately following the first frame, the gate voltage pulse being a gate voltage which changes from a gate-off voltage value effective for turning the thin film transistors off to a gate-on voltage value effective for turning the thin film transistors on, remains at the gate-on voltage value for a predetermined pulse time, and then changes from the gate-on voltage value to the gate-off voltage value; and

drain driving means for applying a drain voltage indicative of a video signal to the drain of each of the thin film transistors, the drain voltage changing to a first drain voltage value at a time during the gate voltage pulse in the first frame and remaining at the first drain voltage value until at least an end of the gate voltage pulse in the first frame such that the first drain voltage value overlaps the gate voltage pulse in the first frame for a first overlap time, and changing to a second drain voltage value at a time during the gate voltage pulse in the second frame and remaining at the second drain voltage value until at least an end of the gate voltage pulse in the second frame such that the second drain voltage value overlaps the gate voltage pulse in the second frame for a second overlap time;

wherein the second overlap time is greater than the first overlap time if a difference between the gate-on voltage value and the second drain voltage value is less than a difference between the gate-on voltage value and the first drain voltage value, and is less than the first overlap time if the difference between the gate-on voltage value and the second drain voltage value is greater than the difference between the gate-on voltage value and the first drain voltage value.