DMA emulation for non-DMA capable interface cards

• US 5,784,595 A
• Filed: 08/07/1997
• Issued: 07/21/1998
• Est. Priority Date: 11/09/1994
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Kam, Patrick, Keller, Emory D., Devins, Robert J., Hon, Stephen
• Primary Examiner(s): Teska, Kevin J.
• Assistant Examiner(s): PHAN, THAI Q
• Application Number:
  US08/908,214
• Time in Patent Office: 348 Days
• Field of Search: 395/500, 395/821, 395/842, 395/843, 395/846, 364/242.3, 364/242.31, 364/242.34, 364/DIG. 1, 364/578
• US Class Current: 703/24
• CPC Class Codes: G06F 13/105 where the programme performs an input/output emulation function
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 9/45537 Provision of facilities of other operating environments, e.g. WINE I/O emulation G06F13/105

Abstract

A method and system are disclosed for simulating a direct memory access (DMA) function to access memory in a host computer having a DMA controller for the purpose of enabling the transfer of data between the host memory and a computer accessory data handling device not capable of DMA operation. The accessory data handling device can be operably connected to the host. The address contents of the DMA controller can be read to determine the location in the host memory where data is to be transferred from the host memory to the accessory data handling device or from the accessory data handling device to the host memory. Data is read from the host memory at the address specified in the DMA controller and written to the accessory data handling device or read from the accessory data handling device and written to the host memory at the address specified by the DMA controller, respectively. The host computer is informed that a DMA operation corresponding to the data transfer has been completed when the data transfer required has been completed.

Claims

1. A method of simulating a direct memory access (DMA) function without using DMA request and DMA acknowledge signals to access memory in a host computer having a DMA controller controlling access to said memory for the purpose of enabling the transfer of data between said memory and a non-DMA computer accessory data handling device that can be operably connected to said host comprising:

determining the location in said host memory for data to be transferred from said host memory to said accessory data handling device or from said accessory data handling device to said host memory; and

initiating a DMA operation by storing in a memory of said accessory data handling device, control information which includes (1) an amount of data to be transferred and (2) a type of operation to be performed;

reading from the accessory data handling device the amount of data to be transferred and the type of operation to be performed;

for a data transfer from said host memory to said accessory data handling device, reading data from said host memory and writing it to said accessory data handling device;

or for a data transfer from said accessory data handling device to said host memory, reading data from said accessory data handling device and writing it to said host memory, respectively;

informing said host computer that a DMA operation corresponding to said data transfer has been completed.

2. The method of claim 1, wherein said location in said host memory is determined by reading memory address contents of said DMA controller.

3. The method of claim 2, wherein said operation of reading the memory address contents of said DMA controller includes reading the starting address of the location in said host memory for said data.

4. The method of claim 3, wherein a maximum amount of data to be transferred is read from the DMA controller.

5. The method of claim 4, wherein the information in said DMA controller is updated to indicate the end of a DMA operation when said data transfer has been completed.

6. The method of claim 3, wherein the address information in said DMA controller is updated as data is transferred between said host memory and said accessory data handling device to maintain the currency of said DMA controller information corresponding to information that would be present if an actual DMA access of said host memory had taken place.

7. The method of claim 4, wherein the determination of said starting address includes calculating an address compensation factor for determining the correct starting address if said DMA controller of said host free runs when it is unmasked.

8. A method of simulating direct memory access with a non-DMA accessory data handling device in a computer system without using DMA request and DMA acknowledge signals, said computer system comprising a host computer having memory and a DMA controller for accessing said memory, said host computer being adapted to accept said accessory data handling device;

in which an application program (host application) adapted to run on said host using DMA data transfers sets up the DMA controller with the starting address location in said memory of data to be transferred between said host and said accessory data handling device, and which application sends a command to said accessory data handling device to commence DMA operation, said method comprising the steps of;

initiating a DMA operation by storing in a memory of said accessory data handling device, control information which includes (1) an amount of data to be transferred and (2) a type of operation to be performed,

responding to said application command requesting a commencement of DMA operation, by interrupting said host application to initiate a TSR program, said TSR program;

reading from said DMA controller the starting address and reading from said memory of said accessory data handling device the amount of data to be transferred and the type of operation to be performed,

reading data from said host memory or said accessory data handling device respectively;

writing data to said accessory data handling device or said host memory respectively to transfer said data;

continuing said data transfer until a required amount of data to be transferred has been transferred;

updating addressing information in said DMA controller during said data transfer to correspond to the information that would be present in said DMA controller if a true DMA operation were taking place;

informing the host application that the DMA operation has been completed after all of said required data has been transferred.

9. The method of claim 8, wherein the information in said DMA controller is updated to indicate the end of a DMA operation when said data transfer has been completed.

10. The method of claim 8, wherein said application program sets up a maximum amount of data to be transferred between said host and said accessory data handling devices, said responding step further includes reading from DMA controller the maximum amount of data to be transferred.

11. A computer system comprising a host computer having memory and a DMA controller for accessing said memory, said host computer being adapted to accept a non-DMA accessory data handling device;

in which an application program adapted to run on said host using DMA data transfers sets up the DMA controller with the address location in said memory of data to be transferred between said host and said accessory data handling device, and which application initiates a DMA operation by sending a command to and storing control information in, said accessory data handling device said control information includes (1) an amount of data to be transferred and (2) a type of operation to be performed;

said computer system including;

means for simulating direct memory access with said accessory data handling device without using DMA request and DMA acknowledge signals comprising;

said accessory data handling device having memory means for storing said control information;

means for responding to said application command and interrupting said application program, to (1) read from said DMA controller the address of data, to be transferred and (2) read from said memory in said accessory data handling device the amount of data to be transferred and the type of operation to be performed;

means for reading data from said host memory or said accessory data handling device and, for writing data to said accessory data handling device or said host memory respectively to transfer said data;

means for updating addressing information in said DMA controller during said data transfer to correspond to the information that would be present in said DMA controller if a true DMA operation were taking place;

means for informing the host application that the DMA operation has been completed after all of said data has been transferred.

12. The system of claim 11, further including means for updating said DMA controller to signal the end of a DMA operation after all of said data has been transferred.

13. The system of claim 11, wherein said accessory data handling device comprises a PCMCIA audio accessory card.

14. A computer system comprising a host computer having a memory, a DMA controller to control access thereto and means for simulating a direct memory access (DMA) function for enabling a non-DMA computer accessory data handling device to access said memory without using DMA request and DMA acknowledge signals which are coupled to said DMA controller, said simulating means comprising:

means for determining the location in said host memory for data to be transferred from said host memory to said accessory data handling device or from said accessory data handling device to said host memory;

means for initiating a DMA operation by storing control information in a memory of said accessory data handling device said control information includes (1) an amount of data to be transferred and (2) a type of operation to be performed,

means for reading from the accessory data handling device the amount of data to be transferred and the type of operation to be performed;

means for reading data from said host memory at the address specified in said DMA controller for said data and for writing said data to said accessory data handling device;

or for reading data from said accessory and writing it to said host memory at the address specified by said DMA controller, respectively;

means for informing said host computer that a DMA operation corresponding to said data transfer has been completed.

15. The system of claim 14, wherein said determining means includes means for reading memory address contents of said DMA controller.

16. The system of claim 15, wherein said determining means includes means for reading from said DMA controller the starting address of the location in host memory for said data, and the maximum amount of data to be transferred.

17. The system of claim 16, further including means for updating information in said DMA controller to indicate the end of a DMA operation when said data transfer has been completed.

18. The system of claim 16, wherein said determining means includes means for calculating an address compensation factor for determining the correct starting address if said DMA controller of said host free runs when it is unmasked.

19. The system of claim 14, wherein said accessory data handling device comprises a PCMCIA audio accessory card.

20. The system of claim 14, further including means for updating said address information in said DMA controller as data is transferred between said host and said accessory data handling device to maintain the currency of said DMA controller information corresponding to information that would be present if an actual DMA access of said memory had taken place.

21. The system of claim 14, further including means for updating information in said DMA controller to indicate the end of a DMA operation when said data transfer has been completed.

22. A computer program recorded on suitable media for operating on a host computer having memory and a DMA controller for accessing said memory, for enabling a non-DMA computer accessory data handling device to simulate a direct memory access (DMA) function to access said memory in said host computer without using DMA request and DMA acknowledge signals comprising:

a first routine for determining a location in said host memory for data to be transferred from said host memory to said accessory data handling device or from said accessory data handling device to said host memory,

said first routine also for initiating a DMA operation by storing in a memory of the accessory data handling device control information which includes (1) an amount of data to be transferred and (2) a type of operation to be performed and storing said control information in a memory of said accessory data handling device;

a second routine for interrupting said first routine and reading from the accessory data handling device the amount of data to be transferred and the type of operation to be performed;

said second routine also for reading data from said host memory at the address specified in said DMA controller for said data and for writing it to said accessory data handling device or reading data from said accessory data handling device and writing it to said host memory at the address specified by said DMA controller for said data, respectively; and

,

said second routine further for informing said host computer that a DMA operation corresponding to said data transfer has been completed.

23. The program of claim 22, wherein said determining routine includes a routine for reading the memory address contents of said DMA controller.

24. The program of claim 23, wherein said determining routine includes a routine for reading from said DMA controller the starting address of the location in host memory for said data, and for reading the maximum amount of data to be transferred.

25. The program of claim 24, further including a routine for updating information in said DMA controller to indicate the end of a DMA operation when said data transfer has been completed.

26. The program of claim 24, wherein said routine for the determination of said starting address includes a routine for calculating an address compensation factor for determining the correct starting address if said DMA controller of said host free runs when it is unmasked.

27. The program of claim 22, further including a routine for updating said address information in said DMA controller as data is transferred between said host and said accessory data handling device to maintain the currency of said DMA controller information corresponding to information that would be present if an actual DMA access of said memory had taken place.

28. The program of claim 22, further including a routine for updating information in said DMA controller to indicate the end of a DMA operation when said data transfer has been completed.