Pin selection system for microcontroller having multiplexer selects between address/data signals and special signals produced by special function device
First Claim
Patent Images
1. A pin function selection circuit for a microcontroller, comprising:
- a configuration register having contents, said configuration register comprising an output configuration register and an input configuration register indicating a function of external pins of the microcontroller; and
a function selection circuit connected to the configuration register, to the external pins and to microcontroller units using different input/output function signals, said function selection circuit comprising;
a multiplex circuit connected to said output configuration register and the microcontroller units; and
a driver circuit connected to said input configuration register, said multiplex circuit, said microcontroller units and the external pins,said multiplex circuit comprising;
bit multiplexers connected to the microcontroller units and the driver circuit; and
a decode unit connected to the output configuration register and the bit multiplexers.
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Abstract
A microcontroller with selectable function external pins. Program controllable configuration registers control pin function selection through multiplexers which select between data/address lines and special function unit output lines and which control line drivers which are disabled when the pins are used as input pins.
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Citations
7 Claims
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1. A pin function selection circuit for a microcontroller, comprising:
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a configuration register having contents, said configuration register comprising an output configuration register and an input configuration register indicating a function of external pins of the microcontroller; and a function selection circuit connected to the configuration register, to the external pins and to microcontroller units using different input/output function signals, said function selection circuit comprising; a multiplex circuit connected to said output configuration register and the microcontroller units; and a driver circuit connected to said input configuration register, said multiplex circuit, said microcontroller units and the external pins, said multiplex circuit comprising; bit multiplexers connected to the microcontroller units and the driver circuit; and a decode unit connected to the output configuration register and the bit multiplexers. - View Dependent Claims (2)
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3. An external pin selection system for external pins of a single chip microcontroller, comprising:
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a bus interface unit providing address/data signals over an external bus; an output configuration register having contents programmable by the microcontroller; an input configuration register having contents programmable by the microcontroller; a special function device controllable by the microcontroller producing special function output signals and receiving special function input signals; an output decode unit connected to said output configuration register and producing an output selection signal responsive to contents of said output configuration register; a multiplexer connected to said output decode unit, said bus interface unit and said special function device, and selecting between the address/data signals and the special function output signals responsive to the output selection signal; an input decode unit connected to said input configuration register and producing an input selection signal responsive to the contents of said input configuration register; a line driver circuit connected to said input decode unit, the external pins and said multiplexer, and providing signals from said multiplexer responsive to the input selection signal; and a data buffer connected between the external pins and said special function device and buffering the special function input signals. - View Dependent Claims (4, 5, 6)
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7. An external pin selection system for external pins of a single chip microcontroller, comprising:
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a bus interface unit providing address/data signals over an external bus, said external bus having a programmable address bus width; a configuration register having contents programmable by the microcontroller; a special function device controllable by the microcontroller producing special function output signals and receiving special function input signals; a decode unit connected to said configuration register and producing an output selection signal and an input selection signal in response to contents of said configuration register; a multiplexer connected to said decode unit, said bus interface unit and said special function device, and selecting between the address/data signals and the special function output signals responsive to the output selection signal; a line driver circuit connected to said input decode unit, the external pins and said multiplexer, and providing signals from said multiplexer responsive to the input selection signal; and a data buffer connected between the external pins and said special function device and buffering the special function input signals.
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Specification