Smart battery system with an A/D converter that converts both positive and negative analog input signals

• US 5,789,899 A
• Filed: 11/15/1996
• Issued: 08/04/1998
• Est. Priority Date: 11/10/1994
• Status: Expired due to Fees

• Current Assignee: Microchip Technology Incorporated
• Original Assignee: PowerSmart, Inc. (Microchip Technology Incorporated)
• Inventors: Hruska, Louis, Friel, Daniel D., Hull, Matthew P., Taylor, Alwyn H., Wieczorek, Rudi, van Phuoc, Duong, Zeising, Elmar
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): TOATLEY, GREGORY J
• Application Number:
  US08/751,109
• Time in Patent Office: 627 Days
• Field of Search: 320/30, 320/48, 320/49, 341/143, 341/155, 341/158
• US Class Current: 320/112
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• CPC Class Codes: H01M 10/42 Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells H01M10/60 takes precedence
• CPC Class Codes: H01M 10/4257 Smart batteries, e.g. electronic circuits inside the housing of the cells or batteries
• CPC Class Codes: H01M 10/44 Methods for charging or discharging circuits for charging H02J7/00
• CPC Class Codes: H01M 10/48 Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte constructional details of current conducting connections for detecting conditions inside cells or batteries, e.g. details of voltage sensing terminals, H01M50/569
• CPC Class Codes: H01M 6/5011 for several cells simultaneously or successively
• CPC Class Codes: H02J 7/00 Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• CPC Class Codes: H02J 7/00036 Charger exchanging data with battery
• CPC Class Codes: H02J 7/00047 with provisions for charging different types of batteries
• CPC Class Codes: H02J 9/061 for DC powered loads
• CPC Class Codes: Y02E 60/10 Energy storage using batteries
• CPC Class Codes: Y10S 320/13 Fault detection

Abstract

A battery pack and a method of operating a battery system. The battery pack includes a rechargeable battery, an analog-to digital converter, and a processor. The analog-to digital converter is able to convert both positive and negative analog signals to digital signals; and, in use, the converter receives analog signals representing battery voltage, battery temperature, and battery current, and converts those signals to digital signals. The processor receives those digital signals from the converter and uses those digital signals to perform a series of calculations.

Claims

1. A battery pack comprising:

terminal means for connecting the battery pack to a battery powered device and to a battery recharger;

a battery including at least one rechargeable battery cell connected to the terminal means, said battery having

i) a discharge mode for supplying electrical power to the battery powered device, and

ii) a charge mode for receiving electrical power from the terminal means;

sensing means for sensing and generating analog signals representing battery voltage, battery temperature, and battery current;

an analog-to-digital converter for receiving said analog signals and for converting both positive and negative analog signals to digital signals representing battery voltage, battery temperature, and battery current;

a processor connected to the analog-to-digital converter for receiving the digital signals therefrom, and for performing a predefined series of calculations using said digital signals; and

a memory area for storing data values including at least values representing battery voltage, battery temperature and battery current.

2. A battery pack according to claim 1, wherein the analog-to-digital converter includes:

a bandgap reference circuit to provide a preset analog voltage; and

a voltage shifting circuit to provide a variable base reference voltage to facilitate generating digital values representing positive and negative analog signals.

3. A battery pack according to claim 2, wherein the analog-to-digital converter further includes a voltage divider network to receive the preset analog voltage from the bandgap reference circuit and to divide said preset analog voltage into a plurality of voltage output values.

4. A battery pack according to claim 2, wherein the analog-to-digital converter further includes a sigma-delta converter for receiving the analog signals from the sensing means and for converting said analog signals to digital values representing battery voltage, battery temperature, and battery current.

5. A battery pack according to claim 1, wherein the analog-to-digital converter processes each of the analog signals representing battery voltage, battery temperature, and battery current for a respective period to produce the digital values representing battery voltage, battery temperature, and battery current.

6. A battery pack according to claim 5, further including:

an oscillator for generating clock signals at a given frequency; and

means to transmit said clock signals to the analog-to-digital converter; and

wherein each of said periods has a length determined by said clock signals.

7. A smart battery pack according to claim 6, wherein:

the analog-to-digital converter processes the analog signals representing battery voltage, battery temperature, and battery current for first, second and third periods respectively; and

the lengths of said first, second and third periods are determined by the lengths of time required for the analog-to-digital converter to receive, respectively, first, second and third numbers of the clock signals.

8. A battery pack according to claim 2, wherein the voltage shifting circuit includes:

a first capacitor having first and second opposite sides;

means to generate a reference ground voltage level; and

a switching network for applying the reference ground voltage level and the analog signals to the first and second sides of the capacitor to develop a voltage level at the capacitor;

the switching network having

i) a first state for applying the reference ground voltage level to the first side of the capacitor, and for applying at least one of said analog signals to the second side of the capacitor, and

ii) a second state for applying the reference ground voltage level to the second side of the capacitor, and for applying at least one of said analog signals to the first side of the capacitor.

9. A battery pack according to claim 8, wherein:

the analog-to-digital converter further includes a sigma-delta converter including

i) means to generate a second reference voltage level,

ii) an integrator having first and second inputs,

iii) means to apply the second reference voltage level to the first input of the integrator, and

iv) a switch electrically located in series between the first capacitor and the second input of the integrator; and

the switch has

i) a conductive state for applying the voltage level of the first capacitor to the second input of the integrator, and

ii) a non-conductive state for electrically decoupling the first capacitor from the second input of the integrator.

10. A battery pack according to claim 8, wherein the sigma-delta converter further includes:

a second capacitor electrically located in parallel with the integrator; and

a further switch electrically located in parallel with the second capacitor to selectively discharge said second capacitor.

11. A battery pack according to claim 8, wherein:

the integrator has an output voltage level;

the sigma-delta converter further includes

v) a comparator having first and second inputs,

vi) means to apply the second reference voltage level to the first input of the comparator, and

vii) means to apply the output voltage level of the integrator to the second input of the comparator; and

the comparator has

i) a first output when the voltage level applied to the first input of the comparator is less than the voltage level applied to the second input of the comparator, and

ii) a second output when the voltage level applied to the first input of the comparator is greater than the voltage level applied to the second input of the comparator.

12. A battery pack according to claim 11, wherein:

the sigma-delta converter further includes

vii) a counter, and

ix) means for applying the output of the comparator to the counter; and

the counter maintains a count of the number of times the first output of the comparator is applied to the counter during a defined period of time.

13. An analog-to-digital converter including:

input means to receive positive and negative analog input signals;

a signal converter to receive the analog signals from the input means and for converting both positive and negative analog signals to digital signals; and

output means for receiving the digital signals from the converter means and transmitting the digital signals from the analog-to-digital converter.

14. An analog-to-digital converter according to claim 13, wherein the signal converter includes:

a bandgap reference circuit to provide a preset analog voltage; and

a voltage shifting circuit to provide a variable base reference voltage to facilitate generating digital values representing positive and negative analog signals.

15. An analog-to-digital converter according to claim 14, wherein the signal converter further includes a voltage divider network to receive the preset analog voltage from the bandgap reference circuit and to divide said preset analog voltage into a plurality of voltage output values.

16. An analog-to-digital converter according to claim 13, wherein:

the input means receives a plurality of different types of input signals; and

the signal converter further includes a sigma-delta converter to receive said different types of input signals and to process the different types of input signals for different periods of time to produce digital signals representing the input signals.

17. An analog-to-digital converter according to claim 16, wherein:

the sigma-delta converter includes a clock input to receive clock input signals at defined frequencies; and

the different periods of time have lengths determined by the lengths of time required for the sigma-delta to receive different numbers of the clock signals.

18. An analog-to-digital converter according to claim 14, wherein the voltage shifting circuit includes:

a first capacitor having first and second opposite sides;

means to generate a reference ground voltage level; and

a switching network for applying the reference ground voltage level and the analog signals to the first and second sides of the capacitor to develop a voltage level at the capacitor;

the switching network having

i) a first state for applying the reference ground voltage level to the first side of the capacitor, and for applying analog signals to the second side of the capacitor, and

ii) a second state for applying the reference ground voltage level to the second side of the capacitor, and for applying the input signals to the first side of the capacitor.

19. An analog-to-digital converter according to claim 18, wherein:

the signal converter further includes a sigma-delta converter including

i) means to generate a second reference voltage level,

ii) an integrator having first and second inputs,

iii) means to apply the second reference voltage level to the first input of the integrator, and

iv) a switch electrically located in series between the first capacitor and the second input of the integrator; and

the switch has

i) a conductive state for applying the voltage level of the first capacitor to the second input of the integrator, and

ii) a non-conductive state for electrically decoupling the first capacitor from the second input of the integrator.

20. An analog-to-digital converter according to claim 19, wherein the sigma-delta converter further includes:

a second capacitor electrically located in parallel with the integrator; and

a further switch electrically located in parallel with the second capacitor to selectively discharge said second capacitor.

21. An analog-to-digital converter according to claim 19, wherein:

the integrator has an output voltage level;

the sigma-delta converter further includes

v) a comparator having first and second inputs,

vi) means to apply the second reference voltage level to the first input of the comparator, and

vii) means to apply the output voltage level of the integrator to the second input of the comparator; and

the comparator has

i) a first output when the voltage level applied to the first input of the comparator is less than the voltage level applied to the second input of the comparator, and

ii) a second output when the voltage level applied to the first input of the comparator is greater than the voltage level applied to the second input of the comparator.

22. An analog-to-digital converter according to claim 21, wherein:

the sigma-delta converter further includes

i) a counter, and

ii) means for applying the output of the comparator to the counter; and

the counter maintains a count of the number of times the first output of the comparator has been applied to the counter during a defined period of time.

23. A method of operating a battery system having a rechargeable battery, a processor, a memory area and an analog-to-digital converter, the method comprising:

connecting the rechargeable battery to a battery powered device to supply electrical power thereto;

sensing, and generating analog signals representing, battery voltage, battery temperature and battery current, said analog signal including both positive and negative signals;

transmitting said analog signals to the analog-to-digital converter;

the analog-to-digital converter, converting both the positive and negative analog signals to digital signals representing battery voltage, battery temperature and battery current; and

storing data values in the memory area, said stored data values including at least values representing battery voltage, battery temperature and battery current.

24. A method according to claim 23, wherein the step of converting the analog signals to digital signals includes the steps of:

generating a preset analog bandgap references voltage; and

generating a variable base reference voltage to facilitate generating digital values from both positive and negative analog current signals.

25. A method according to claim 24, wherein the step of generating the bandgap reference voltage includes the step of dividing the bandgap reference voltage into a plurality of output voltage values.

26. A method according to claim 25, wherein the step of converting the analog signals to digital signals further includes the steps of processing each of the analog signals representing battery voltage, battery temperature and battery current for a respective period of time to produce the digital values representing battery voltage, battery temperature and battery current.

27. A method according to claim 26, further including the steps of:

generating clock signals at a given frequency;

transmitting the clock signals to the analog-to-digital converter; and

using the clock signals to determine the lengths of said periods of time.

28. A method according to claim 24, wherein:

the step of generating the base reference voltage includes the steps of generating a reference ground voltage level; and

the step of converting the analog signals to digital signals further includes the step of developing a voltage level in a capacitor having first and second opposite sides, including the steps of

i) at first times, applying the reference ground voltage level to the first side of the capacitor, and applying the analog signals to the second side of the capacitor, and

ii) at other times, applying the reference ground voltage level to the second side of the capacitor, and applying at least one of the analog signals to the first side of the capacitor.

29. A method according to claim 28, wherein the step of converting the analog signals to digital signals further includes the steps of:

generating a second reference voltage level;

applying the second reference voltage level to a first input of an integrator; and

selectively applying the voltage level of the capacitor to a second input of the integrator.

30. A method according to claim 29, wherein:

the integrator has an output voltage level;

the step of converting the analog signals to digital signals further includes the steps of

i) applying the second reference voltage level to a first input of a comparator, and

ii) applying the output voltage level of the integrator to a second input of the comparator;

the comparator has a first output voltage level when the voltage level applied to the first input of the comparator is less than the voltage level applied to the second input of the comparator, and the comparator has a second output voltage level when the voltage level applied to the first input of the comparator is greater than the voltage level applied to the second input of the comparator; and

the step of converting the analog signals to digital signals further includes the step of (iii) counting the number of times the comparator has the first output voltage level during a defined period of time.

31. A method of operating an analog-to-digital converter, comprising the steps of:

conducting both positive and negative analog signals to the converter; and

converting both the positive and negative analog signals to digital signals, including the steps of

i) generating a preset analog signal, and

ii) generating a variable base reference signal to facilitate generating digital signals representing positive and negative analog signals.

32. A method according to claim 31, wherein the step of converting the positive and negative analog signals includes the step of dividing the preset analog signal into a plurality of voltage output values.

33. A method according to claim 31, wherein:

the conducting step includes the step of conducting a plurality of different types of input signals to the converter; and

the step of converting the positive and negative analog signals further includes the step of processing the different types of input signals for different periods of time to produce digital signals representing the input signals.

34. A method according to claim 33, wherein:

the step of processing the different types of input signals includes the step of conducting clock signals to the converter at defined frequencies; and

the different periods of time have lengths determined by the lengths of time required for the converter to receive different numbers of the clock signals.

35. A method according to claim 31, wherein:

the step of generating the base reference voltage includes the steps of generating a reference ground voltage level; and

the step of converting the analog signals to digital signals further includes the step of developing a voltage level in a capacitor having first and second opposite sides, including the steps of

i) at first times, applying the reference ground voltage level to the first side of the capacitor, and applying the analog signals to the second side of the capacitor, and

ii) at other times, applying the reference ground voltage level to the second side of the capacitor, and applying at least one of the analog signals to the first side of the capacitor.

36. A method according to claim 35, wherein the step of converting the analog signals to digital signals further includes the steps of:

generating a second reference voltage level;

applying the second reference voltage level to a first input of an integrator; and

selectively applying the voltage level of the capacitor to a second input of the integrator.

37. A method according to claim 36, wherein:

the integrator has an output voltage level;

the step of converting the analog signals to digital signals further includes the steps of

i) applying the second reference voltage level to a first input of a comparator, and

ii) applying the output voltage level of the integrator to a second input of the comparator;

the comparator has a first output voltage level when the voltage level applied to the first input of the comparator is less than the voltage level applied to the second input of the comparator, and the comparator has a second output voltage level when the voltage level applied to the first input of the comparator is greater than the voltage level applied to the second input of the comparator, and

the step of converting the analog signals to digital signals further includes the step of (iii) counting the number of times the comparator has the first output voltage level during a defined period of time.