Automated flat panel display control system for accomodating broad range of video types and formats

• US 5,790,096 A
• Filed: 09/03/1996
• Issued: 08/04/1998
• Est. Priority Date: 09/03/1996
• Status: Expired due to Term

• Current Assignee: Crain Caton & James PC, LG Electronics, Inc. (LG Corporation)
• Original Assignee: Allus Technology Corporation
• Inventors: Hill, Jacques R. Jr.
• Primary Examiner(s): Saras, Steven J.
• Assistant Examiner(s): Vail, Seth D.
• Application Number:
  US08/707,338
• Time in Patent Office: 700 Days
• Field of Search: 345/20, 345/127, 345/131, 345/147, 345/150, 345/153, 345/154, 345/211, 345/214, 348/387, 348/441, 348/443, 348/460, 348/525, 348/529, 348/530, 348/531
• US Class Current: 345/600
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2340/0407 Resolution change, inclusive of the use of different resolutions for different screen areas
• CPC Class Codes: G09G 2340/0414 Vertical resolution change
• CPC Class Codes: G09G 2340/0421 Horizontal resolution change
• CPC Class Codes: G09G 2340/0471 Vertical positioning
• CPC Class Codes: G09G 2340/0478 Horizontal positioning
• CPC Class Codes: G09G 2340/0485 Centering horizontally or vertically
• CPC Class Codes: G09G 2340/0492 Change of orientation of the displayed image, e.g. upside-down, mirrored
• CPC Class Codes: G09G 2360/02 Graphics controller able to handle multiple formats, e.g. input or output formats
• CPC Class Codes: G09G 2370/042 for monitor identification
• CPC Class Codes: G09G 5/005 Adapting incoming signals to the display format of the display terminal
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04
• CPC Class Codes: G09G 5/008 Clock recovery
• CPC Class Codes: G09G 5/028 Circuits for converting colour display signals into monochrome display signals

Abstract

An electronics control system for full color and monochrome flat panel displays which automatically accommodates video signals of numerous types and formats, whether interlaced, non-interlaced, composite, or video signals with separated sync signals. Display of such video signals on a wide selection of flat panel display systems also is accommodated. Incoming and output video rates are asynchronous. Plug-in modules allow the system to convert video signals of numerous types and modes for display on any flat panel display system. Images are both automatically, and under user control, up-sized and down-sized, positioned and oriented to fit the flat panel display being used. Color images are automatically reduced to grey scale monochrome when a monochrome flat panel display is being used. Push-pull A/D converter circuitry for digitizing color video signals is used to reduce cost while conserving power. A further power saving feature provides for automatic power down when video reception is interrupted, and power up when the video reception is reacquired.

Claims

1. An electronic control system receiving a video signal and any one video type of a plurality of video types from a video signal source for visual presentation on a flat panel display, which comprises:

a universal video input selector means for receiving said any one video type and automatically determining video format of said video signal, and for automatically extracting synchronization components and image components from said video signal;

color reduction means in electrical communication with said universal video input selector means for producing digital signals from said image components and reducing said digital signals to a monochrome display image when said video signal is a color signal and said flat panel display is a monochrome display, and otherwise passing said digital signals through without reduction;

storage means in electrical communication with said universal video input selector means and said color reduction means for storing said monochrome display image when said video signal is said color signal and said flat panel display is said monochrome display, and otherwise storing said digital signals; and

timing control means in electrical communication with said universal video input selector means, said color reduction means, and said storage means for controlling processing of said video signal at an incoming video rate, and controlling a reading of said storage means for asynchronously outputting a stored one of said monochrome display image and said digital signals to said flat panel display at an outgoing video rate.

2. The electronic control system of claim 1, wherein said universal video input selector means is comprised of any one of plural plug-in connectors including 15 pin VGA, BNC, and RCA type connectors, each of which has a unique code identifying said any one video type of said video signal.

3. An electronic control system receiving a video signal from a video signal source for visual presentation on a flat panel display, which comprises:

video input connector means for receiving composite and component video signals, and for generating a first code indicating a video type of said video signal;

composite video converter means in electrical communication with said video input connector means for separating chrominance signals and luminance signals from said video signal when said video type is composite;

video input selector means in electrical communication with said video input connector means and said composite video converter means for selecting color chrominance signals and said luminance signals if said video type is composite and for selecting said component video signals if said video type is component;

synchronization signal separation means in electrical communication with said video input connector means, said composite video converter means and said video input selector means for extracting horizontal synchronization signals and vertical synchronization signals from said video signal as required by said video type;

A/D converter means in electrical communication with said video input selector means for receiving said chrominance signals and said luminance signals from said video input selector means to produce digital signals;

color to monochrome reduction means in electrical communication with said A/D converter means and receiving said digital signals for mixing said digital signals in accordance with weighting formulas to provide color-to-monochrome transition signals when said video signal is a color signal and said flat panel display is a monochrome display, and otherwise passing said digital signals through without reduction;

frame buffer means in electrical communication with said color-to-monochrome reduction means and said A/D converter means for storing received ones of said digital signals and said color-to-monochrome transition signals at a first data and asynchronously outputting said received ones at a second data rate compatible with said flat panel display;

microprocessor means in electrical communication with said video input connector means, said composite video converter means, said video input selector means, said synchronization signal separation means, said A/D converter means, and said color-to-monochrome reduction means, and receiving said first code and a second code, for determining video format of said video signal and a flat panel display type, and for controlling operation of said electronic control means, and for supplying said weighting formulas to said color-to-monochrome reduction means;

pixel clock generator means in electrical communication with said microprocessor means, said synchronization signal separation means, and said A/D converter means, and responsive to said horizontal synchronization signals, said vertical synchronization signals, and said microprocessor means for generating pixel clock signals which are synchronized to said horizontal synchronization signals and supplied to said A/D converter means to control processing of said video signal;

frame buffer input control means in electrical communication with said synchronization signal separation means, said frame buffer means, said pixel clock generator means, and said microprocessor means for controlling storage of said digital signals and said color-to-monochrome transition signals into said frame buffer means;

flat panel timing generator means in electrical communication with said microprocessor means, said frame buffer input control means, said pixel clock generator means, and said synchronization signal separation means for generating output control timing signals to drive said flat panel display, fit an image on said flat panel display, and control power sequencing in turning said electronic control system on and off as said video signal is received and interrupted;

image size/position control means in electrical communication with said microprocessor means, said frame buffer means, and said flat panel timing generator means for generating image control signals to control size, position and orientation of a video image presented on said flat panel display;

frame buffer output control means in electrical communication with said microprocessor means, said frame buffer means, and said image size/position control means for controlling addressing and output data rate of said received ones stored in said frame buffer means;

power circuit means in electrical communication with said microprocessor means for supplying power-up voltages to said electronic control system; and

flat panel interface module means in electrical communication with said microprocessor means, said flat panel timing generator means, said power circuit means, and said frame buffer means, and receiving said received ones from said frame buffer means at said second data rate, said output control timing signals from said flat panel timing generator means, and a power-up voltage from said power circuit means, for routing said received ones, said output control timing signals, and said power-up voltage to said flat panel display system, and for supplying said second code to said microprocessor means to identify said flat panel display type.

4. The electronic control system of claim 3, wherein said synchronization signal separation means includes a synchronization signal detector for locking onto said horizontal synchronization signals and said vertical synchronization signals.

5. The electronic control system of claim 3, wherein said video input connector means is a plug-in module which may be interchanged with selected ones of plural other plug-in modules to accommodate any type and format of said video signal.

6. The electronic control system of claim 3, wherein said digital signals are comprised of red, green and blue color signals.

7. The electronic control system of claim 3, wherein said video input connector means includes a selectably variable voltage reference to accommodate a wide range of amplitudes of said video signals.

8. The electronic control system of claim 3, wherein said frame buffer means is comprised of plug-in frame buffer modules of varying bit length and frame size to accommodate a wide variety of video formats.

9. The electronic control system of claim 3, wherein said electronic control system includes user controls in electrical communication with said microprocessor means for changing said weighting formulas and varying image contrast, position, brightness, and orientation, and shrinking and expanding said image on said flat panel display.

10. The electronic control system of claim 9, wherein said user controls are comprised of analog controls, digital controls and configuration switches.

11. The electronic control system of claim 3, wherein said first data rate is an incoming video data rate and said second data rate is an asynchronous outgoing flat panel display data rate.

12. The electronic control system of claim 3, wherein said A/D converter means is comprised of a pair of A/D converters per video color signal, wherein one of said pair of A/D converters digitizes even pixels and another of said pair of A/D converters digitizes odd pixels for accommodating high data rates.

13. The electronic control system of claim 3, wherein said video types include VGA with said vertical synchronization signals and said horizontal synchronization signals separated, RS-170/RS-343 sync-on green, RS-170/RS-343 RGB separate composite sync, composite NTSC and PAL types, and said video formats include NTSC, PAL, HDTV, SECAM, XGA, SVGA, RGB, VGA 640×

480 Graphics, VGA 80×

25 Text, and VGA 640×

350 Graphics.

14. The electronic control system of claim 3, wherein said microprocessor means determines said video formats on basis of number of said horizontal synchronization signals that are detected by said synchronization signal separation means for each of said vertical synchronization signals detected by said synchronization signal separation means, and polarity of said vertical synchronization signals and said horizontal synchronization signals.

15. The electronic control system of claim 3, wherein said electronic control system accommodates video resolutions up to at least 2048×

2048 rows and columns.

16. The electronic control system of claim 3, wherein said video input connector means may be any one of a 15 pin VGA, BNC, or RCA type connectors.

17. The electronic control system of claim 3, wherein said flat panel interface module means is a plug-in module which may be interchanged with any selected one of plural other plug-in modules to accommodate any type of said flat panel display.

18. The electronic control system of claim 17, wherein said plug-in module electrically communicates with any one of a color or monochrome LCD, electroluminescent, gas plasma or FED flat panel display.

19. The electronic control system of claim 3 wherein said second code identifies any one of at least 256 different flat panel display types.

20. The electronic control system of claim 3, wherein said video signal may be any one of interlaced and non-interlaced video signals.

21. A system for controlling size, position and orientation of a video image presented on a flat panel display, and in electrical communication with a memory system having stored therein said video image, and receiving a video signal from a video source, which comprises:

timing control means receiving said video signal from said video source at a video signal data rate for generating therefrom enable, vertical synchronization, horizontal synchronization, and first clock signals for driving said flat panel display, generating column start, row start, column replicate, and row replicate control signals for sizing said video image while maintaining a video signal resolution, and generating first control signals for reading said video image in said memory system;

image size/position control means in electrical communication with said timing control means and responsive to said column start, row start, column replicate, and row replicate control signals and said first control signals for generating output column address control signals, output row address control signals for said memory system, and a pixel clock signal; and

frame buffer output control means in electrical communication with said timing control means, said memory system, said image size/position control means, and said flat panel display, and responsive to said pixel clock signal for reading said video image from said memory system.

22. An analog-to-digital converter system for digitizing a video signal received from a video source at a high data rate, which comprises:

timing control means in electrical communication with said video source and receiving said video signal for generating a pixel clock signal in synchronization with a horizontal synchronization signal of said video signal;

a first analog-to-digital converter in electrical communication with said timing control means and said video source, and receiving said video signal and said pixel clock signal, and generating therefrom odd pixel data signals;

an inverter in electrical communication with said timing control means, and receiving said pixel clock signal, and producing an inverted pixel clock signal;

a second analog-to-digital converter in electrical communication with said inverter and said video source, and receiving said inverted pixel clock signal and said video signal, and generating therefrom even pixel data signals; and

a two-to-one multiplexer in electrical communication with said first analog-to-digital converter, said timing control means, said inverter, and said second analog-to-digital converter, and interlacing said odd pixel data signals and said even pixel data signals to produce a pixel signal representative of said video signal with no loss of resolution.

23. A system for reducing video color signals received from a video source to monochrome grey scale signals, which comprises:

digitizing means in electrical communication with said video source for digitizing said video color signals to produce a red digital color signal, a green digital color signal, and a blue digital color signal;

AND gate logic means in electrical communication with said digitizing means and receiving said red digital color signal, said green digital color signal, and said blue digital color signal, for producing first logic signals;

memory means in electrical communication with said AND gate logic means and having stored therein weighting values for mixing said red digital color signal, said green digital color signal and said blue digital color signal;

microprocessor means in electrical communication with said memory means for storing said weighting values; and

OR gate logic means in electrical communication with said AND gate logic means and receiving said first logic signals to produce a monochrome grey scale video signal for presentation on said flat panel display.

24. A method of power-up and power down sequencing in an electronic control system for a flat panel display, said electronic control system having a first timing control system for generating digital synchronization signals, a second timing control system in electrical communication with said first timing control system for generating digital color signals and digital transition signals from a video signal received from a video source, a memory system in electrical communication with said first timing control system, said second timing control system, and said flat panel display, and having stored therein said digital color signals and said digital transition signals, and a backlight inverter power supply means in electrical communication with said first timing control system and said second timing control system, comprising the steps of:

supplying power to said flat panel display;

T1 seconds after supplying power to said flat panel display, applying synchronizations signals from said first timing control system to said flat panel display;

T2 seconds after supplying power to said flat panel display, applying said digital color signals and said digital transition signals from said memory system to said flat panel display;

T3 seconds after supplying power to said flat panel display, supplying power to said backlight inverter power supply means;

When power to said electronic control system is to be turned off, turning off power to said backlight inverter power supply means first;

T4 seconds after power to said backlight inverter power supply means is turned off, turning power to said memory system off;

T5 seconds after power to said backlight inverter power supply means is turned off, turning power to said first timing control system off, and

T6 seconds after power to said backlight inverter power supply means is turned off, turning power to said flat panel display off.

25. The method of claim 24, wherein the step of supplying power to said flat panel display occurs when said video signal is received, and the step of turning off power to said backlight inverter power supply means occurs when said video signal is no longer received.

26. An electronic control system receiving a video signal from a video signal source and forming therefrom a display image for visual presentation on a flat panel display, which comprises:

a first timing control system for identifying a video type and a video format, for separating chrominance signals, luminance signals, and synchronization signals from said video signal, for separating primary color signals from said chrominance signals, for separating vertical synchronization signals and horizontal synchronization signals from said synchronization signals, and for reducing said primary color signals into digital transition signals as required by said video type for storage at a video rate of said video signal to form a display image;

a second timing control system in electrical communication with said first timing control system and said flat panel display, and responsive to said vertical synchronization signals and said horizontal synchronization signals for determining image parameters and a flat panel video rate for said flat panel display, and for positioning, orienting, and sizing said display image; and

a memory system in electrical communication with said first timing control system and said second timing control system for receiving said digital transition signal at said video rate, and asynchronously outputting said display image to said flat panel display at said flat panel video rate.

27. A method of receiving a video signal having any one of plural video types and any one of plural video formats, and displaying said video signal on a flat panel display, which includes the steps of:

identifying said one of plural video types and said one of plural video formats of said video signal;

separating luminance signals, chrominance signals, and synchronization signals from said one of plural video types, and red component signals, green component signals, and blue component signals from said chrominance signals, and vertical synchronization signals and horizontal synchronization signals from said synchronization signals;

reducing said red component signals, said green component signals, and said blue component signals in accordance with one of plural weighting formulas to produce a first monochrome video signal if said video signal is a color video signal and said flat panel display is a monochrome display, and otherwise passing said red component signals, said green component signals, and said blue component signals through without reduction;

in response to said vertical synchronization signals and said horizontal synchronization signals for said one of said plural video formats, and at a first video rate of said video signal, and as one of interlaced and non-interlaced signals, receiving said first monochrome video signal if said video signal is said color video signal and said flat panel display is said monochrome display, receiving said color video signal if said flat panel display is a color display, and receiving said video signal if said video signal is a second monochrome video signal and said flat panel display is said monochrome display or said color display, thereby forming a display image; and

positioning, sizing, and orienting said display image while transferring said display image to said flat panel display asynchronously at a flat panel video rate.

28. The method of claim 27, wherein said display image is one or more of an upside down image form, a portrait image form, a mirror-image form, and a rotated image form.

29. The method of claim 27, wherein said plural weighting formulas are comprised of the following:

space="preserve" listing-type="tabular">______________________________________ NTSC Weighting 5/16 Red 9/16 Green 2/16 Blue Equal Weighting 5/16 Red 6/16 Green 5/16 Blue Green Only 0/16 Red 16/16 Green 0/16 Blue ______________________________________

30. The method of claim 27, wherein said plural video types are comprised of composite video and component video types, and said plural video formats are comprised of all RGB video formats including VGA, SVGA, XGA, NTSC, PAL, and SECAM.

31. The method of claim 27, wherein said flat panel display is one of LCD, electroluminescent, gas plasma, and FED display.

32. The method of claim 27, wherein said plural video types are up to 256 in number, and include VGA with separate HSYNC and VSYNC, RS-170/RS-343 RGB Sync-On-Green, RS-170/RS-343 RGB Separate Composite Sync, Composite Video (NTSC/PAL), and Computer Video (HDTV).

33. The method of claim 27, wherein said plural video formats include NTSC, PAL, HDTV, VGA 640×

480 Graphics, VGA 80×

25 Text, and VGA 640×

350 Graphics.

34. The method of claim 27, wherein said first video rate is slower than and asynchronous to said flat panel video rate.

35. The method of claim 27, wherein said first video rate is faster than and asynchronous to said flat panel video rate.

36. The method of claim 27, wherein said step of reducing occurs in accordance with the following general equation:

##EQU2## where "+" refers to a logical OR function and "

" refers to a logical AND function.