Apparatus and method using an ID instruction to identify a computer microprocessor
First Claim
1. In a microprocessor formed on an integrated circuit, an identification apparatus for identifying the microprocessor in response to a supplied ID instruction, said identification apparatus comprising:
- a first register for storing and reading data;
a read-only memory storing microprocessor ID data including data fields that identify the microprocessor type;
a decoder for receiving and decoding an ID instruction; and
control circuitry coupled to the first register, the read-only memory and the decoder, including ID instruction execution means responsive to a decoded ID instruction including for executing the ID instruction received from the decoder, including reading the microprocessor ID data from the read-only memory and storing said microprocessor ID data in the first register.
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Accused Products
Abstract
An identification apparatus and method for identifying the microprocessor, including a read-only memory for storing microprocessor ID data having data fields for identifying the microprocessor, and control logic for executing an ID instruction that reads the microprocessor ID data from the read-only memory and stores it in a register that can be selectively read by a programmer. The identification apparatus and method also include an ID flag indicative of implementation of the ID instruction in the microprocessor, and a test flag program for testing the ID flag to determine whether or not to execute the ID instruction. The method is available at any time while the microprocessor is operating, for example during initialization of the system software, installation of a program, or while a program is running. Once a microprocessor has been identified, features appropriate to the specific microprocessor can be enabled, and work-around programs can be installed. The method prevents execution of the ID instruction on microprocessors that do not have the identification system, and prevents execution of the test flag program on microprocessors that do not have a test flag location. The invention is particularly useful for groups of compatible microprocessor families whose development is continually advancing with introduction of new families and models.
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Citations
26 Claims
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1. In a microprocessor formed on an integrated circuit, an identification apparatus for identifying the microprocessor in response to a supplied ID instruction, said identification apparatus comprising:
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a first register for storing and reading data; a read-only memory storing microprocessor ID data including data fields that identify the microprocessor type; a decoder for receiving and decoding an ID instruction; and control circuitry coupled to the first register, the read-only memory and the decoder, including ID instruction execution means responsive to a decoded ID instruction including for executing the ID instruction received from the decoder, including reading the microprocessor ID data from the read-only memory and storing said microprocessor ID data in the first register. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. In a computer microprocessor, an identification apparatus for identifying the computer microprocessor in response to a CPUID instruction, said identification apparatus comprising:
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a general purpose register for storing and reading data; a microprocessor ID memory element for storing microprocessor ID data including data fields that identify the microprocessor type; a decoder for receiving instructions; a control means for executing instructions received from the decoder, said control means including CPUID executing means for executing a CPUID instruction that reads the microprocessor ID data from the ID memory element and supplies said microprocessor ID data to the general purpose register; a read/write memory element including an ID flag indicative of the existence of said microprocessor ID memory element and said CPUID executing means; test program means for supplying a sequence of instructions to the decoder and the control means, said sequence including instructions to read said read/write memory element and for testing the ID flag to ascertain the existence of said microprocessor ID memory element; and program means responsive to the test program means for supplying the CPUID instruction to the decoder and the control means. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A computer-implemented method for identifying a microprocesser that is a member of a set of microprosser families comprising a first group that does not implement a microprosser ID instructing and a second group that does not implement the micrprosser ID instruction, said method comprising the steps of:
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(a) executing a flag test instruction sequence that tests an ID flag to determined wheather the microprosser is in the first group or the second group; (b) if execution of said flag test instruction sequence in the step (a) indicates that the microprocessor is in the first group, then avoiding execution of a microprocessor ID instruction following the flag test instruction sequence; and (c) if execution of said flag test instruction sequence in the step (a) indicates that the microprocessor is in the second group, then executing a microprocessor ID instruction following the flag test instruction sequence to load the contents of a microprocessor ID memory element within said microprocessor that includes microprocessor ID data indicative of microprocessor type to a general purpose register. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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22. A computer-implemented method for identifying a microprocessor that is a member of a set of compatible microprocessor families including an advanced set of families having an ID flag location in a flags register and a basic set of families not having an ID flag location in the flags register, the advanced set of families including a first group that does not implement a microprocessor ID instruction and a second group that does implement the microprocessor ID instruction including a microprocessor ID memory element storing microprocessor ID data including data fields that identify the microprocessor type, said method comprising the steps of:
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(a) determining if the microprocessor is a member of the basic set of families or a member of the advanced set of families; (b) if said microprocessor is a member of the advanced set of families, then (b)(i) executing a flag test instruction sequence that tests an ID bit to determine whether the microprocessor is in the first group or the second group of the advanced set of families, (b)(ii) if execution of said flag test instruction sequence in the step (b)(i) indicates that the microprocessor is in the first group, then preventing execution of a microprocessor ID instruction following the test bit instruction, and (b)(iii) if execution of said flag test instruction sequence in the step (b)(ii) indicates that the microprocessor is in the second group, then executing a microprocessor ID instruction following the test bit instruction to supply the contents of said microprocessor ID memory element to a programmer; and
,(c) if the microprocessor is a member of the basic set of families, then avoiding execution of an instruction that would otherwise test the ID bit, and avoiding execution of the microprocessor ID instruction. - View Dependent Claims (23, 24, 25, 26)
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Specification