Modem sharing

• US 5,790,895 A
• Filed: 10/18/1996
• Issued: 08/04/1998
• Est. Priority Date: 10/18/1996
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Compaq Computer Corporation (HP Inc.)
• Inventors: Emerson, Theodore F., Krontz, Jeoff M.
• Primary Examiner(s): Donaghue, Larry D.
• Application Number:
  US08/733,415
• Time in Patent Office: 655 Days
• Field of Search: 395/821, 395/884, 395/856, 395/200.53, 395/728, 395/732, 395/860, 395/872, 379/93.05, 370/825.08, 370/825.06, 370/825.04, 370/825.07, 370/825.15
• US Class Current: 710/64
• CPC Class Codes: G06F 9/5011 the resources being hardware resources other than CPUs, Servers and Terminals

Abstract

An apparatus supports the sharing of a resource among computer applications. The computer system has a processor which adapted for executing a first application in a first mode of operation and a second application in a second mode of operation. The computer system also has a communication port adapted to receive the resource. The communication port is normally allocated to receive accesses from the second application. The computer system also has a virtual port for emulating the communication port. The virtual port diverts accesses from the first application directed at the communication port and buffers the accesses in the virtual port. An arbitrator is connected to the processor, the communication port, and the virtual port. The arbitrator claims the communication port from the second application and forwards accesses received by the virtual port to the communication port if the first application is accessing the resource and if the communication port is idle. Further, the arbitrator reallocates the communication port back to the second application upon the termination of accesses to the resource by the first application.

Claims

1. A computer system having a first mode of operation and a second mode of operation, said modes of operation sharing access to a resource, said computer system comprising:

a processor adapted for executing a first application in the first mode of operation and a second application in the second mode of operation;

a data storage device coupled to said processor, said data storage device adapted to buffer data associated with said first and second modes of operation;

a communication port for communicating with the resource, said communication port normally allocated to receive accesses from the second application;

a virtual port for emulating said communication port, said virtual port diverting accesses from the first application directed at said communication port and buffering the accesses in said virtual port; and

an arbitrator coupled to said processor, said communication port, and said virtual port, said arbitrator claiming said communication port from the second application and forwarding accesses received by said virtual port to said communication port if the first application is accessing the resource and if said communication port is idle, said arbitrator reallocating said communication port to said second application upon the termination of accesses to the resource by the first application.

2. The computer system of claim 1, wherein said first mode is an operating system mode and said second mode is a remote console mode.

3. The computer system of claim 1, further comprising a first bus coupled to said processor and to said arbitrator.

4. The computer system of claim 3, wherein said first bus is a Peripheral Component Interconnect (PCI) bus.

5. The computer system of claim 4, wherein said PCI bus has cycles, said arbitrator positively decoding the PCI cycles to said communication port when said first application accesses said communication port while said second application owns said resource.

6. The computer system of claim 4, wherein said virtual port snoops accesses to the resource from the first application to allow said arbitrator to detect the termination of accesses to the resource from said first application.

7. The computer system of claim 4, wherein said virtual port emulates registers of a Universal Asynchronous Receiver/Transmitter (UART).

8. The computer system of claim 7, wherein said virtual port generates an interrupt to said processor, further comprising a Transmitter Data Buffer (TDB) register, said virtual port interrupting said processor when said TDB register is written to.

9. The computer system of claim 8, wherein said communication port has registers corresponding to said virtual port registers, further comprising an interrupt handler, said interrupt handler forwarding the contents of said registers in said virtual port to registers in said communication port if said arbitrator has claimed said communication port for the first application.

10. The computer system of claim 8, wherein said virtual port generates a System Management Interrupt (SMI) to the processor when said TDB register is written to.

11. The computer system of claim 3, further comprising a second bus coupled to said processor, wherein said communication port is coupled to said second bus.

12. The computer system of claim 11, wherein said second bus is selected from a group consisting of an Industry Standard Architecture (ISA) bus and an Extended Industry Standard Architecture (EISA) bus.

13. The computer system of claim 3, wherein said first bus is a Peripheral Component Interconnect (PCI) bus and wherein said communication port is coupled to said PCI bus.

14. The computer system of claim 1, wherein said communication port is located at a communication port address and wherein said first and second applications direct accesses to said communication port address.

15. The computer system of claim 1, further comprising an operating system for execution by said processor, said operating system identifying and initializing said virtual port upon booting up.

16. The computer system of claim 15, wherein said first application establishes a connection to a remote computer using a protocol, said arbitrator further comprising a protocol detector for detecting accesses to said first application.

17. The computer system of claim 16, wherein said protocol detector examines a predetermined number of characters transmitted from said remote computer to detect the first application protocol.

18. The computer system of claim 16, wherein said protocol detector gobbles said predetermined number of characters and wherein said remote computer retransmits said predetermined number of characters.

19. The computer system of claim 16, wherein said protocol detector forwards all data characters or predetermined signals to the first application.

20. The computer system of claim 1, wherein said resource is an industry standard modem.

21. The computer system of claim 1, wherein said communication port is located at a predetermined interrupt range and wherein said virtual port is located at a virtual interrupt range, said arbitrator translating said virtual interrupt range into said predetermined interrupt range.

22. The computer system of claim 1, wherein said accesses from first and second applications are accesses directed at a modem.

23. An apparatus for sharing access to a resource in a computer system, said computer system having a first mode of operation and a second mode of operation, said computer system having a processor adapted for executing a first application in the first mode of operation and a second application in the second mode of operation, said apparatus comprising:

a communication port for receiving the resource, said communication port normally allocated to receive accesses from the second application;

a virtual port for emulating said communication port, said virtual port diverting accesses from the first application directed at said communication port and buffering the accesses in said virtual port; and

an arbitrator coupled to said processor, said communication port, and said virtual port, said arbitrator claiming said communication port from the second application and forwarding accesses received by said virtual port to said communication port if the first application is accessing the resource and if said communication port is idle, said arbitrator reallocating said communication port to said second application upon the termination of accesses to the resource by the first application.

24. The apparatus of claim 23, wherein said first mode is an operating system mode and said second mode is a remote console mode.

25. The apparatus of claim 23, further comprising a first bus coupled to said processor and to said arbitrator.

26. The apparatus of claim 25, wherein said first bus is a Peripheral Component Interconnect (PCI) bus.

27. The apparatus of claim 26, wherein said PCI bus has cycles, said arbitrator positively decoding the PCI cycles to said communication port when said first application accesses said communication port while said second application owns said resource.

28. The apparatus of claim 26, wherein said virtual port snoops accesses to the resource from the first application to allow said arbitrator to detect the termination of accesses to the resource from said first application.

29. The apparatus of claim 26, wherein said virtual port emulates registers of a Universal Asynchronous Receiver/Transmitter (UART).

30. The apparatus of claim 29, wherein said virtual port generates an interrupt to said processor, further comprising a Transmitter Data Buffer (TDB) register, said virtual port interrupting said processor when said TDB register is written to.

31. The computer system of claim 30, further comprising a second bus coupled to said processor, wherein said communication port is coupled to said second bus.

32. The apparatus of claim 30, wherein said virtual port generates a System Management Interrupt (SMI) to the processor.

33. The apparatus of claim 25, further comprising a second bus coupled to said first bus, wherein said communication port resides on said second bus.

34. The apparatus of claim 33, wherein said second bus is selected from a group consisting of an Industry Standard Architecture (ISA) bus and an Extended Industry Standard Architecture (EISA) bus.

35. The apparatus of claim 25, wherein said first bus is a Peripheral Component Interconnect (PCI) bus and wherein said communication port is coupled to said PCI bus.

36. The apparatus of claim 23, wherein said communication port is located at a communication port address and wherein said first and second applications direct accesses to said communication port address.

37. The apparatus of claim 23, further comprising an operating system for execution by said processor, said operating system identifying and initializing said virtual port upon booting up.

38. The apparatus of claim 37, wherein said first application establishes a connection to a remote computer using a protocol, said arbitrator further comprising a protocol detector for detecting accesses to said first application.

39. The apparatus of claim 38, wherein said protocol detector examines a predetermined number of characters transmitted from said remote computer to detect the first application protocol.

40. The apparatus of claim 38, wherein said protocol detector gobbles said predetermined number of characters and wherein said remote computer retransmits said predetermined number of characters.

41. The apparatus of claim 38, wherein said protocol detector forwards all data characters to the first application.

42. The apparatus of claim 23, wherein the resource is an industry standard modem.

43. The apparatus of claim 23, wherein said communication port is located at a predetermined interrupt range and wherein said virtual port is located at a virtual interrupt range, said arbitrator translating said virtual interrupt range into said predetermined interrupt range.

44. The apparatus of claim 23, wherein said accesses from first and second applications are accesses directed at a modem.

45. A method for sharing a resource in a computer system between a first application executing in a first mode of operation and a second application executing in a second mode of operation, said computer system having a communication port which is adapted to receive the resource, the method comprising the steps of:

initially allocating said communication port to the second application;

emulating the communication port with a virtual port;

buffering accesses to the communication port from the first application to said virtual port;

detecting whether the communication port is being accessed by the first application;

when the second application is not accessing the communication port, claiming the resource from the second application and forwarding accesses stored in said virtual port to said communication port; and

upon the termination of accesses from the first application, reallocating said communication port to the second application.

46. The method of claim 45, wherein said executing step further comprises the step of running the first application in an operating system mode.

47. The method of claim 45, wherein said executing step further comprises the step of running the second application in a remote console mode.

48. The method of claim 45, wherein said computer system has PCI bus cycles, further comprising the step of positively decoding the PCI cycles to said communication port when said first application accesses said communication port while said second application owns said resource.

49. The method of claim 48, further comprising the step of snooping accesses to the resource from the first application to detect the termination of accesses to the resource from said first application.

50. The method of claim 45, further comprising the step of emulating registers of a Universal Asynchronous Receiver/Transmitter (UART).

51. The method of claim 50, wherein one of said registers is a Transmitter Data Buffer (TDB) register, further comprising the step of interrupting said processor when said TDB register is written to.

52. The method of claim 51, wherein said communication port has registers corresponding to said virtual port registers, further comprising the step of forwarding the contents of said registers in said virtual port to registers in said communication port if said arbitrator has claimed said communication port for the first application.

53. The method of claim 52, wherein said interrupting step comprises the step of generating a System Management Interrupt (SMI) to the processor.

54. The method of claim 45, wherein said first application establishes a connection to a remote computer using a protocol, further comprising the step of detecting said protocol from said remote computer.

55. The method of claim 54, further comprising the step of examining a predetermined number of characters transmitted from said remote computer to detect said protocol.

56. The method of claim 55, further comprising the step of causing said remote computer to retransmit said predetermined number of characters.

57. The method of claim 55, further comprising the step of forwarding said buffered characters to the first application.

58. The method of claim 46, wherein said communication port is located at a predetermined interrupt range and wherein said virtual port is located at a virtual interrupt range, further comprising the step of translating said virtual interrupt range into said predetermined interrupt range.

59. The method of claim 58, wherein virtual port is located at an ISA compatible interrupt range.