Method and device for performing modulo-based arithmetic operations in an asynchronous transfer mode cell processing system
First Claim
1. A method of performing arithmetic operations in an asynchronous transfer mode (ATM) cell processing system, the method comprising the steps of:
- receiving a first instruction specifying an arithmetic operation on the contents of a processor register;
determining if the first instruction includes an indication that the arithmetic operation is to be performed modulo a specified number of bits, such that the result of the operation will include a modulo portion; and
executing at least one subsequent branch instruction based on the modulo portion of the result of the first instruction if the first instruction includes the indication.
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Accused Products
Abstract
Methods and apparatus for processing cells in an asynchronous transfer mode (ATM) communication system. An ATM cell processor provides a modulo arithmetic feature which permits branching on the modulo portion of the result of an arithmetic operation. An arithmetic logic unit (ALU) or other processor instruction is modified to include a modulo field which specifies the number of right to left bits after which the result of the corresponding ALU operation will be truncated. Conditional branch instructions such as branch on zero result, branch on non-zero result, branch on negative result, branch on carry and branch on overflow may be configured to operate only on the modulo portion of the ALU instruction result and/or on a carry out of the most significant bit (MSB) position of the modulo portion.
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Citations
22 Claims
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1. A method of performing arithmetic operations in an asynchronous transfer mode (ATM) cell processing system, the method comprising the steps of:
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receiving a first instruction specifying an arithmetic operation on the contents of a processor register; determining if the first instruction includes an indication that the arithmetic operation is to be performed modulo a specified number of bits, such that the result of the operation will include a modulo portion; and executing at least one subsequent branch instruction based on the modulo portion of the result of the first instruction if the first instruction includes the indication. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 17, 18, 19)
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9. An apparatus for use in an asynchronous transfer mode (ATM) cell processing system, comprising:
a processor including a plurality of registers and an arithmetic logic unit, wherein the processor is operative to receive a first instruction specifying an arithmetic operation on the contents of a processor register, to determine if the first instruction includes an indication that the arithmetic operation is to be performed modulo a specified number of bits, such that the result of the operation will include a modulo portion, and to execute at least one subsequent branch instruction based on the modulo portion of the result of the first instruction if the first instruction includes the indication. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 20, 21, 22)
Specification