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Arbitration system for a shared DMA logic on a network adapter with a large number of competing priority requests having predicted latency field

  • US 5,794,073 A
  • Filed: 01/29/1997
  • Issued: 08/11/1998
  • Est. Priority Date: 11/07/1994
  • Status: Expired due to Term
First Claim
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1. A system for arbitrating between multiple requests for a shared resource, wherein said shared resource is a Direct Memory Access logic within a network adapter, and said Direct Memory Access logic is coupled with a data bus in a host computer system, comprising:

  • first determining means for determining a priority of each request in a first request class, said first request class consisting of transmit data requests to use said Direct Memory Access logic to read transmit data from a host memory in said host computer system, said transmit data to be transmitted onto a network coupled with said network adapter;

    second determining means for determining a high or a low priority of each request in a second request class, said second request class consisting of receive data requests to use said Direct Memory Access logic to write receive data from said network adapter into said host memory;

    first selecting means, responsive to said first determining means, for selecting a first selected request equal to one of said requests in said first request class having a highest priority;

    second selecting means, responsive to said second determining means, for selecting a second selected request equal to one of said requests in said second request class having a high priority;

    weighted arbitration means, for choosing between said first selected request and said second selected request based on a 1 of N round robin arbitration, said second selected request selected once every N times said shared resource is available, and N is a predetermined integer;

    means for generating a priority vector associated with each transmit data request, higher values of said priority vector indicating higher priority, said priority vector including a predicted latency field;

    means for calculating a value `CL` for each transmit data request, where CL is equal to an estimated time period since the last transmission on the virtual circuit for each specific transmit data request estimated to have elapsed at the time said transmit data is actually read from said host memory into said network adapter; and

    means for writing said value CL into the priority vector for each said transmit data request.

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