Method of manufacturing a semiconductor device having a trench structure

• US 5,795,792 A
• Filed: 05/10/1996
• Issued: 08/18/1998
• Est. Priority Date: 01/20/1994
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation), Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Nishihara, Hidenori
• Primary Examiner(s): TRINH, MICHAEL MANH
• Application Number:
  US08/644,874
• Time in Patent Office: 830 Days
• Field of Search: 437/6, 437/24, 437/65, 437/66, 437/67, 437/68, 437/72, 437/203
• US Class Current: 438/133
• CPC Class Codes: H01L 21/76232 of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls H01L21/76229 takes precedence
• CPC Class Codes: H01L 21/763 Polycrystalline semiconductor regions H01L21/76264 takes precedence
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/4232 with insulated gate
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

Abstract

A trench is formed on a main surface of a p+ type monocrystalline silicon substrate. A silicon oxide film is formed extending from the inner surface of trench onto the main surface of p+ type monocrystalline silicon substrate. The thickness of a corner portion positioned on the upper end corner portion of the sidewall of trench in silicon oxide film is larger than the thickness of silicon oxide film positioned on the sidewall of trench. An n type polycrystalline silicon layer extending from the inside of trench onto the main surface of p+ type monocrystalline silicon substrate is formed on silicon oxide film. Thus, a semiconductor device having a trench structure with an improved breakdown voltage for an insulating layer positioned on an upper end corner portion of the sidewall of a trench is obtained.

Claims

1. A method of manufacturing a semiconductor device having a trench structure, comprising the steps of:

forming an impurity implanted region by implanting an impurity into a prescribed region of a main surface of a semiconductor substrate;

forming a mask layer patterned into a prescribed shape so as to partially overlap said impurity implanted region on the main surface of said semiconductor substrate;

forming a trench penetrating through a part of said impurity implanted region by anisotropically etching the main surface of said semiconductor substrate using said mask layer as a mask;

removing said mask layer after forming said trench;

forming an oxide film on the entire main surface of said semiconductor substrate by thermally oxidizing the entire main surface of said semiconductor substrate so that the thickness of the oxide film positioned on an upper end corner portion of a sidewall of the trench is greater than the thickness of the oxide film positioned on the sidewall of the trench excluding the upper end corner portion; and

forming a conductive layer on said oxide film extending from the inside of said trench onto the main surface of said semiconductor substrate, wherein

said step of forming said trench includes a step of forming a recess having part of its bottom surface within said impurity implanted region by isotropic etching the main surface of said semiconductor substrate using said mask layer as a mask, before an anisotropic etching treatment for forming said trench.

2. A method of manufacturing a semiconductor device having a trench structure as recited in claim 1, wherein

said step of removing said mask layer includes a step of subjecting an upper end corner portion of the sidewall of said trench to an ion beam etching treatment using inert gas ions after removing said mask layer.

3. A method of manufacturing a semiconductor device having a trench structure, comprising the steps of:

forming an impurity implanted region by implanting an impurity into a prescribed region of a main surface of a semiconductor substrate;

forming a mask layer patterned into a prescribed shape so as to partially overlap said impurity implanted region on the main surface of said semiconductor substrate;

forming a trench penetrating through a part of said impurity implanted region by anisotropically etching the main surface of said semiconductor substrate using said mask layer as a mask;

removing said mask layer after forming said trench;

forming an oxide film on the entire main surface of said semiconductor substrate by thermally oxidizing the entire main surface of said semiconductor substrate so that the thickness of the oxide film positioned on an upper end corner portion of a sidewall of the trench is greater than the thickness of the oxide film positioned on the sidewall of the trench excluding the upper end corner portion; and

forming a conductive layer on said oxide film extending from the inside of said trench onto the main surface of said semiconductor substrate, wherein

said step of forming said mask layer includes the steps of;

forming a first oxide film on the main surface of said semiconductor substrate;

forming a nitride film on said first oxide film;

forming a second oxide film on said nitride film;

forming said mask layer selectively exposing the main surface of said semiconductor substrate and partially overlapping an end region of said impurity implanted region by patterning said first oxide film, said nitride film and said second oxide film into prescribed shapes; and

forming a third oxide film extending under said mask layer and having a part of its bottom surface within said impurity implanted region by selectively oxidizing the main surface of said semiconductor substrate using said mask layer as a mask, and

said step of forming said trench includes the steps of;

selectively exposing the main surface of said semiconductor substrate by anisotropic etching of said mask layer and said third oxide film before forming said trench; and

removing said mask layer and said third oxide film remaining under said mask layer after forming said trench.

4. A method of manufacturing a semiconductor device having a trench structure as recited in claim 3, wherein

said step of removing said mask layer includes a step of rounding an upper end corner portion of the sidewall of said trench by subjecting the upper end corner portion of the sidewall of said trench to an ion beam etching treatment using inert gas ions after removing said mask layer.