Semiconductor device having a plurality of circuits driven by different power sources and formed on the same substrate
First Claim
1. A semiconductor device comprising:
- a semiconductor substrate having at least a first well and a second well which are electrically divided from each other;
a first electric circuit formed in said first well and connected to a first circuit power source through a source terminal;
a second electric circuit formed in said second well and connected to a second circuit power source through a source terminal;
a substrate ground well formed on said semiconductor substrate and connected to a third circuit power source which outputs a stable reference potential;
a first protection diode connected between said source terminal of said first power source and said substrate ground well in the manner of being a reverse bias direction; and
a second protection diode connected between said source terminal of said second power source and said substrate ground well in the manner of being a reverse direction;
whereby interference between said first and second power sources is prevented by said first and second protection diodes;
wherein said first protection diode and/or said second protection diode comprises or respectively comprise any or combination of a diode, bipolar transistors which are connected with each other in a diode connection, and metal oxide layer semiconductor (MOS) transistors which are connected with each other in a diode connection.
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Accused Products
Abstract
A semiconductor device has a semiconductor substrate including at least a first well and a second well which is electrically divided each other; a first electric circuit formed in the first well and connected to a first circuit power source through a source terminal; a second electric circuit formed in the second well and connected to a second circuit power source through a source terminal; a substrate ground well formed on the semiconductor substrate and connected to a third circuit power source which outputs a stable reference potential; a first protection diode connected between the source terminal of the first power source and the substrate ground well in the manner of being a reverse bias direction; and a second protection diode connected between the source terminal of the second power source and the substrate ground well in the manner of being a reverse direction.
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Citations
13 Claims
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1. A semiconductor device comprising:
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a semiconductor substrate having at least a first well and a second well which are electrically divided from each other; a first electric circuit formed in said first well and connected to a first circuit power source through a source terminal; a second electric circuit formed in said second well and connected to a second circuit power source through a source terminal; a substrate ground well formed on said semiconductor substrate and connected to a third circuit power source which outputs a stable reference potential; a first protection diode connected between said source terminal of said first power source and said substrate ground well in the manner of being a reverse bias direction; and a second protection diode connected between said source terminal of said second power source and said substrate ground well in the manner of being a reverse direction; whereby interference between said first and second power sources is prevented by said first and second protection diodes; wherein said first protection diode and/or said second protection diode comprises or respectively comprise any or combination of a diode, bipolar transistors which are connected with each other in a diode connection, and metal oxide layer semiconductor (MOS) transistors which are connected with each other in a diode connection. - View Dependent Claims (4)
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2. A semiconductor device comprising:
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a semiconductor substrate having at least a first well and a second well which are electrically divided from each other; a first electric circuit formed in said first well and connected to a first circuit power source through a source terminal; a second electric circuit formed in said second well and connected to a second circuit power source through a source terminal; a substrate ground well formed on said semiconductor substrate and connected to a third circuit power source which outputs a stable reference potential; a first protection diode connected between said source terminal of said first power source and said substrate ground well in the manner of being a reverse bias direction; and a second protection diode connected between said source terminal of said second power source and said substrate ground well in the manner of being a reverse direction; whereby interference between said first and second power sources is prevented by said first and second protection diodes; a semiconductor substrate formed from a P-type semiconductor in which a hole density is larger than a conduction electron density; a digital circuit as said first electric circuit provided in a first deep N-well formed on said semiconductor substrate by an N-type high concentration semiconductor in which a conduction electron density is larger than a hole density, and said digital circuit being connected through said power source terminal to a digital circuit power source; an analog circuit as said second electric circuit provided with electrically insulated to said digital circuit in a second deep N-well formed on said semiconductor substrate by said N-type high concentration semiconductor, and said analog circuit being connected through said power source terminal to an analog circuit power source; a substrate grounding first P-well formed by said P-type semiconductor on said semiconductor substrate for grounding and being connected through a ground terminal exclusively using for said substrate to said third circuit power source for adding a stable reference potential; said first protection diode connected between said power source terminal of said digital circuit power source and said substrate grounding first P-well in the manner of making a reverse bias; and
saidsaid second protection diode connected between said power source terminal of said analog circuit power source and said substrate grounding first P-well in the manner of making a reverse bias. - View Dependent Claims (5, 6, 7, 8, 9, 10, 11)
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3. A semiconductor device comprising:
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a semiconductor substrate having at least a first well and a second well which are electrically divided from each other; first electric circuit formed in said first well and connected to a first circuit power source through a source terminal; a second electric circuit formed in said second well and connected to a second circuit power source through a source terminal; a substrate ground well formed on said semiconductor substrate and connected to a third circuit power source which outputs a stable reference potential; a first protection diode connected between said source terminal of said first power source and said substrate ground well in the manner of being a reverse bias direction; and a second protection diode connected between said source terminal of said second power source and said substrate ground well in the manner of being a reverse direction; whereby interference between said first and second power sources is prevented by said first and second protection diodes; a semiconductor substrate formed from an N-type semiconductor in which a conduction electron density is larger than a hole density; a digital circuit as said first electric circuit provided in a second deep P-well formed on said semiconductor substrate by a P-type high concentration semiconductor in which a hole density is larger than a conduction electron density, and said digital circuit being connected through said power source terminal to a digital circuit ground; an analog circuit as said second electric circuit provided with electrically insulated to said digital circuit in a third deep P-well formed on said semiconductor substrate by said P-type high concentration semiconductor, and said analog circuit being connected through said power source terminal to an analog circuit ground; a substrate grounding third N-well formed by said N-type semiconductor on said semiconductor substrate for grounding and being connected through a ground terminal exclusively using for said substrate to said third circuit power source for adding a stable reference potential; said first protection diode connected between said power source terminal of said digital circuit power source and said substrate grounding third N-well in the manner of making a reverse bias; and said second protection diode connected between said power source terminal of said analog circuit power source and said substrate grounding third N-well in the manner of making a reverse bias. - View Dependent Claims (12, 13)
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Specification