Baseband video/audio/data transceiver

• US 5,796,440 A
• Filed: 02/29/1996
• Issued: 08/18/1998
• Est. Priority Date: 02/29/1996
• Status: Expired due to Fees

• Current Assignee: Frederick A. Rupinski, Stuart B. Rauch
• Original Assignee: Frederick A. Rupinski, Stuart B. Rauch
• Inventors: Rauch, Stuart B., Rupinski, Frederick A.
• Primary Examiner(s): Kostak, Victor R.
• Application Number:
  US08/608,849
• Time in Patent Office: 901 Days
• Field of Search: 348/12, 348/6, 348/476, 348/478, 348/482, 348/15, 348/17, 348/724, 348/723, 348/725, 348/10
• US Class Current: 348/476
• CPC Class Codes: H04N 7/108 the cable being constituted by a pair of wires
• CPC Class Codes: H04N 7/142 Constructional details of the terminal equipment, e.g. arrangements of the camera and the display
• CPC Class Codes: H04N 7/148 Interfacing a video terminal to a particular transmission medium, e.g. ISDN

Abstract

The BASEBAND VIDEO/AUDIO/DATA TRANSCEIVER invention simultaneously transmits and receives baseband video signals, audio signals, and associated digital data and control signals within a single continuous signal over a single physical transmission line. The device is a single cohesive module, best embodied as an integrated circuit. The audio signals are sampled, and subsequently reconstructed. Audio samples and digital signals are multiplexed, then fed to a multirate elastic buffer. The multiplexed signals are extracted from the elastic buffer coincidentally with the video signal horizontal synchronization pulses and applied to these same pulses, then placed on a channel having a similar transceiver at the other end. The transceiver invention separates the received signals from the transmission line by canceling out its own transmitted signal. The received audio and digital data bursts are culled and reshaped. The video signal horizontal synchronization pulses are simultaneously restored to the received baseband video signal. The culled bursts are fed to a second multirate elastic buffer in synchronism with received video signal horizontal synchronization pulses. The culled multiplexed signals are extracted from the second elastic buffer at a constant reconstruction rate, demultiplexed, and then reconstructed. The transceiver timing and synchronization are controlled by two phase locked loops, one for transmitter timing and one for receiver timing, each with its own clock counting chain. The transmitter loop is locked to the transmitted video signal horizontal synchronization pulses, while the receiver loop is locked to the received video signal horizontal synchronization pulses.

Claims

1. A transceiver circuit module comprising a transmitter, a receiver, a data conversion means, an embedment means, a culling means, a reconstruction means, a control means and an interfacing means which provides for the transmission and reception of television or video signals with information signals embedded in opportune regions of said television or video signals which are any regions where video signals do not exist, in a manner which results in a single composite signal such that the greatest spectral component of said composite signal does not exceed 4.5 megahertz, said information signals being selected from a group consisting of analog audio signals which are locally acquired and held as analog samples, and analog audio signal samples converted to modulated pulse positions, and analog audio signal samples converted to modulated pulse widths, and analog audio signals which have been previously converted to serialized digital samples, and digital serial data streams, and digital serial command streams, said opportune regions being selected from a group consisting of synchronization pulses, front porch regions, back porch regions, blanking regions, and discarded video line regions, said transceiver circuit module providing inherent synchronization of said audio signal with said video signal when deployed either as a pair of said transceiver circuit modules across a single transmission line or when deployed as a multiplicity of said transceiver circuit modules across any number of switched analog video transmission lines.

2. The circuit module of claim 1 further including a multirate timing means which converts constant sample rate signals at the input into concentrated bursts of signals for alignment and embedment into said opportune regions at said transmitter, and which controls the timing and synchronization of the culling of said concentrated bursts of signals embedded in said opportune regions back to constant sample rate signals at said receiver, where the timing relationship of the transmitted signals and of the received signals may be completely independent of each other.

3. The circuit module of claim 2 further including an elastic buffer means at the transmitter and a similar elastic buffer means at the receiver, wherein said elastic buffer means provides storage for a sufficient number of samples of said embedded information signals such that no samples are lost as a consequence of said multirate timing means and notwithstanding that no signal bursts are embedded in the serrated region about a vertical synchronization pulse, and wherein the elements of said elastic buffer means are selected from the group consisting of first in first out buffers, charge transfer analog delay lines, banks of sample and hold circuits, shift registers and dual port random access memories.

4. The circuit module of claim 1 further including a reshaping means to separate and regenerate said original opportune regions, wherein said original opportune regions had been previously altered to embed said information signals being selected from said group consisting of analog audio signals which are locally acquired and held as analog samples, and analog audio signal samples converted to modulated pulse positions, and analog audio signal samples converted to modulated pulse widths, and analog audio signals which have been previously converted to serialized digital samples, and digital serial data streams.

5. The circuit module of claim 1 further comprising acquisition circuits to generate said analog samples;

signal conditioning circuits for application of anti-alias filtering to said data conversion means;

signal processing circuits to control the execution and sequencing of said signal embedment, said signal culling and said signal reconstruction;

signal storage circuits for providing said elastic buffering;

signal routing circuits to specify signal paths among said interface circuits;

all of which function in a cooperative manner to transmit and receive a super composite signal consisting of a standard television baseband composite signal having said audio signals embedded into the regions of the horizontal synchronization pulses.

6. The circuit module of claim 5 wherein an analog embedment means is used to insert said audio signals into said horizontal synchronization pulses, and an analog culling means is used to recover the audio from said horizontal synchronization pulses.

7. The circuit module of claim 6 wherein said analog embedment means consists of an ordered bank of sample and hold circuits such that each of said sample and hold circuits accepts and holds an analog sample in sequential synchronization with the input sample rate, and thereafter embeds the held samples into said horizontal synchronization pulses by a summation means at a burst rate which is sufficiently high to fit said analog samples into said horizontal synchronization pulses.

8. The circuit module of claim 6 wherein said analog culling means consists of an ordered bank of sample and hold circuits such that each of said sample and hold circuits accepts and holds an analog sample in sequential synchronization with the culling burst rate, and thereafter reconstructs the original signal by sequentially scanning the held samples at the original sampling rate and applying them to a smoothing filter.

9. The circuit module of claim 5 wherein a digital embedment means is used to embed said audio, which has been previously converted to serialized digital samples, into said horizontal synchronization pulses, and a digital culling means is used to recover said serialized digital samples from said horizontal synchronization pulses.

10. The circuit module of claim 9 wherein said digital embedment means consists of an elastic buffer which accepts and stores said serialized digital samples in sequential synchronization with the input sample rate, and thereafter unloads said serialized samples from said elastic buffer, then filters said serialized samples and embeds said filtered serialized samples into said horizontal synchronization pulses by a summation means at a burst rate which is sufficiently high to fit said digital serialized samples into said horizontal synchronization pulses.

11. The circuit module of claim 9 wherein said digital culling means consists of an elastic buffer which accepts and stores said serialized digital samples in synchronization with the culling burst rate, and thereafter delivers the original serialized digital samples at the original sample rate for subsequent reconstruction.

12. The circuit module of claim 5 further including a retiming means to align the sampling boundaries of the input samples'"'"' precession with the embedment bursts'"'"' precession for transmitted signals, and retiming means to align the resampling boundaries of the output samples'"'"' precession with the culling bursts'"'"' precession for received signals.

13. The circuit module of claim 5 further including a reshaping means to separate said standard television baseband composit signal and regenerate the regions of said standard television baseband composit signal horizontal synchronization pulses.