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Physical design automation system and process for designing integrated circuit chip using simulated annealing with "chessboard and jiggle" optimization

  • US 5,796,625 A
  • Filed: 03/01/1996
  • Issued: 08/18/1998
  • Est. Priority Date: 03/01/1996
  • Status: Expired due to Term
First Claim
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1. A method of providing an initial temperature in a simulated annealing process, comprising the steps of:

  • (a) providing a placement of cells on the chip;

    (b) performing simulated annealing on the cells using a current temperature without exchanging cell positions;

    (c) computing a current cost function for the placement;

    (d) changing said current temperature in accordance with said cost function; and

    (e) repeating steps (b) to (d) until said current cost function satisfies a predetermined criterion, wherein said current temperature is used as said initial temperature for said simulated annealing process when said predetermined criterion is satisfied.

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