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Data transferring circuit which aligns clock and data

  • US 5,796,795 A
  • Filed: 11/30/1994
  • Issued: 08/18/1998
  • Est. Priority Date: 11/30/1994
  • Status: Expired due to Term
First Claim
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1. A data transferring circuit for maintaining alignment between clock and data, said circuit comprising:

  • input means for receiving first data at a data rate;

    a clock source configured to provide a reference clock which oscillates at a frequency less than said data rate, said clock source being configured so that said reference clock oscillates at a frequency of approximately one half said data rate;

    output means for presenting second data at substantially said data rate;

    a data processor for transforming said first data and said reference clock into said second data and a second reference clock, respectively; and

    a clock regenerator, coupled to said data processor and said output means, for generating a clock signal which oscillates substantially at said data rate and is synchronized to said second reference clock, said clock signal being used to clock said second data into said output means.

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