Method for integrating microelectromechanical devices with electronic circuitry

• US 5,798,283 A
• Filed: 09/06/1995
• Issued: 08/25/1998
• Est. Priority Date: 09/06/1995
• Status: Expired due to Term

• Current Assignee: United States Department of Energy
• Original Assignee: Sandia Corporation (Martin Marietta Corporation)
• Inventors: Sniegowski, Jeffry J., Montague, Stephen, McWhorter, Paul J., Smith, James H.
• Primary Examiner(s): TRINH, MICHAEL MANH
• Application Number:
  US08/524,700
• Time in Patent Office: 1,084 Days
• Field of Search: 437/60, 437/901, 437/921, 437/927, 437/974, 437/228 H, 437/228 O, 437/228 SEN, 148/DIG. 73, 148/DIG. 135
• US Class Current: 438/24
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0728 Pre-CMOS, i.e. forming the micromechanical structure before the CMOS circuit
• CPC Class Codes: G01P 2015/0828 the mass being of the paddle type being suspended at one of its longitudinal ends
• CPC Class Codes: G03F 7/094 Multilayer resist systems, e.g. planarising layers
• CPC Class Codes: G03F 9/70 for microlithography measuring printed patterns for monitoring overlay G03F7/70633 or focus G03F7/70641; projection system adjustment G03F7/70258; position control G03F7/70775

Abstract

A method for integrating one or more microelectromechanical (MEM) devices with electronic circuitry. The method comprises the steps of forming each MEM device within a cavity below a device surface of the substrate; encapsulating the MEM device prior to forming electronic circuitry on the substrate; and releasing the MEM device for operation after fabrication of the electronic circuitry. Planarization of the encapsulated MEM device prior to formation of the electronic circuitry allows the use of standard processing steps for fabrication of the electronic circuitry.

Claims

1. A method for integrating at least one microelectromechanical (MEM) device with electronic circuitry on a substrate comprising the steps of:

(a) etching a cavity within the substrate extending below a device surface of the substrate;

(b) forming the MEM device within the cavity by depositing a plurality of material layers in the cavity and patterning at least one of the material layers, the MEM device being entirely below the device surface of the substrate;

(c) encapsulating the MEM device with at least one sacrificial material, and planarizing the substrate;

(d) fabricating electronic circuitry comprising a plurality of transistors on the device surface of the substrate, including forming electrical interconnections to the encapsulated MEM device; and

(e) removing the sacrificial material at least in part for releasing the MEM device for operation thereof.

2. The method of claim 1 wherein the substrate includes an epitaxial layer formed thereon to provide the device surface.

3. The method of claim 1 further including a step of depositing a nitride layer over the device surface of the substrate and within the cavity prior to forming the MEM device.

4. The method of claim 1 wherein the step of etching the cavity is performed at least in part by a dry etching method.

5. The method of claim 1 wherein the step of etching the cavity is performed at least in part by a wet etchant.

6. The method of claim 5 wherein the wet etchant is selected from the group consisting of KOH, TMAH, and EDP.

7. The method of claim 1 wherein the step of etching the cavity includes forming sloped sidewalls of the cavity.

8. The method of claim 1 wherein the step of forming the MEM device within the cavity includes depositing, patterning, and etching a plurality of layers of micromachineable materials selected from the group consisting of polysilicon, silicon dioxide, silicon nitride, silicate glass and metals and metal alloys.

9. The method of claim 1 wherein the step of encapsulating the MEM device includes depositing a plurality of layers of the at least one sacrificial material.

10. The method of claim 9 wherein the step of forming the MEM device includes depositing a nitride layer within the cavity and on the device surface of the substrate and the step of encapsulating the MEM device and planarizing the substrate includes removing a portion of the sacrificial material extending above the nitride layer on the device surface of the substrate.

11. The method of claim 10 wherein the step of removing the sacrificial material comprises chemical-mechanical polishing of a top side of the substrate.

12. The method of claim 10 wherein the step of encapsulating the MEM device includes depositing a cap layer above the sacrificial material for sealing the encapsulated MEM device.

13. The method of claim 12 wherein the MEM device is free to respond to stimuli applied thereto while being substantially protected by the overlying cap layer.

14. The method of claim 1 wherein the step of fabricating electronic circuitry comprises forming a plurality of electronic devices selected from the group consisting of CMOS devices, BiCMOS devices, and bipolar devices.

15. The method of claim 1 further including a step of depositing a protection layer over the electronic circuitry for protection thereof during the step of removing the sacrificial material.

16. The method of claim 1 wherein the step of removing the sacrificial material includes exposing at least a portion of the sacrificial material by forming a plurality of etch channels and removing the sacrificial material, at least in part, by etching thereof.

17. The method of claim 16 further including a step of plugging each etch channel after removing at least a part of the sacrificial material.

18. The method of claim 1 further including a step of annealing the encapsulated MEM device for removing stress therein.

19. The method of claim 1 wherein the MEM device comprises at least in part polysilicon.

20. A method for integrating at least one microelectromechanical (MEM) device with electronic circuitry comprising the steps of:

(a) providing a substrate having a cavity extending below a device surface of the substrate;

(b) forming the MEM device within the cavity by depositing a plurality of material layers in the cavity and patterning at least one of the material layers, the MEM device being entirely below the device surface of the substrate;

(c) encapsulating the MEM device with sacrificial material and planarizing the substrate prior to fabricating electronic circuitry comprising a plurality of transistors on the device surface of the substrate, including forming electrical interconnections to the encapsulated MEM device; and

(d) removing, at least in part, the sacrificial material and releasing the MEM device for operation thereof after fabricating the electronic circuitry.

21. The method of claim 20 wherein the substrate includes an epitaxial layer formed thereon to provide the device surface.

22. The method of claim 20 wherein the step of forming the MEM device includes depositing, patterning and etching a plurality of layers of micromachineable materials selected from the group consisting of polysilicon, silicon dioxide, silicon nitride, silicate glass and metals.

23. The method of claim 20 wherein the step of encapsulating the MEM device and planarizing the substrate includes removing a portion of the sacrificial material extending above the device surface of the substrate by chemical-mechanical polishing.

24. The method of claim 20 wherein the step of encapsulating the MEM device and planarizing the substrate includes depositing a cap layer above the sacrificial material for sealing the encapsulated MEM device.

25. The method of claim 24 wherein the cap layer forms at least in part an enclosure for packaging the MEM device.

26. The method of claim 20 wherein the step of fabricating electronic circuitry includes forming a plurality of electronic devices selected from the group consisting of CMOS devices, BiCMOS devices, and bipolar devices.

27. The method of claim 20 further including a step of depositing a protection layer over the electronic circuitry for protection thereof during the step of releasing the MEM device.

28. The method of claim 20 wherein the step of removing the sacrificial material and releasing the MEM device includes a step for forming a plurality of etch channels for exposing the sacrificial material, and a step for removing at least a portion of a sacrificial material from the cavity by etching.

29. The method of claim 28 further including a step of plugging each etch channel after removing the sacrificial material from the cavity.

30. A method for integrating at least one microelectromechanical (MEM) device with electronic circuitry on a substrate having an epitaxial layer thereon, comprising the steps of:

(a) etching a cavity below a device surface of the epitaxial layer on the substrate;

(b) forming the MEM device within the cavity by depositing a plurality of material layers in the cavity and patterning at least one of the material layers, with the MEM device being entirely below the device surface of the epitaxial layer;

(c) encapsulating the MEM device with sacrificial material and planarizing the substrate prior to fabricating electronic circuitry comprising a plurality of transistors on the epitaxial layer; and

(d) removing, at least in part, the sacrificial material and releasing the MEM device for operation after fabricating the electronic circuitry.

31. The method of claim 30 wherein the step of forming the MEM device comprises depositing, patterning and etching a plurality of layers of micromachineable materials selected from the group consisting of polysilicon, silicon dioxide, silicate glass, metals and metal alloys.

32. The method of claim 30 wherein the step of removing the sacrificial material includes a step for forming a plurality of etch channels for exposing the sacrificial material and a step for removing at least a portion of the sacrificial material by etching.

33. The method of claim 30 wherein the step of fabricating electronic circuitry comprises forming a plurality of electronic devices selected from the group consisting of CMOS devices, BiCMOS devices, and bipolar devices.

34. The method of claim 30 further including a step for annealing the encapsulated MEM device.