Hermetically sealed microelectronic device and method of forming same

• US 5,801,068 A
• Filed: 11/07/1996
• Issued: 09/01/1998
• Est. Priority Date: 10/03/1994
• Status: Expired due to Term

• Current Assignee: University of Michigan
• Original Assignee: Ford Global Technologies, LLC (Ford Motor Company)
• Inventors: Sooriakumar, Kathirgamasundaram, Meitzler, Allen Henry, McCarthy, Shaun Leaf, Haeberle, Russell J.
• Primary Examiner(s): PICARDAT, KEVIN M
• Application Number:
  US08/745,150
• Time in Patent Office: 663 Days
• Field of Search: 438/51, 438/52, 438/53, 438/54, 438/55, 438/64, 438/65, 438/66, 438/67, 438/759
• US Class Current: 438/51
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/08 the material being an electrical insulator, e.g. glass
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 Gold [Au]

Abstract

A microelectronic device is hermetically sealed at the wafer level. A substrate is provided having associated electronics and at least one metal bonding pad. A dielectric layer, such as pyrex glass film, is sputter deposited atop the substrate to form a glass/metal seal. A glass film is thereafter planarized, preferably by chemical-mechanical polishing, to remove surface variations. A cover wafer is thereafter anodically bonded to the dielectric layer/glass film so as to define a sealed cavity for housing and protecting the substrate electronics. The resultant microelectronic device is packaged in its own hermetically sealed container at the wafer level.

Claims

1. A method of forming a hermetically sealed microelectronic device at the wafer level, comprising:

providing a substrate having associated electronics and at least one metal bond pad;

sputter depositing a dielectric layer atop said substrate to form a dielectric/metal seal;

polishing said dielectric layer to remove surface variations; and

anodically bonding a cover wafer to said dielectric layer so as to form a sealed cavity to house and protect said electronics.

2. The method of claim 1, wherein said substrate is comprises silicon.

3. The method of claim 1, wherein said cover wafer comprises silicon.

4. The method of claim 1, wherein said dielectric layer comprises pyrex glass.

5. The method of claim 1, wherein said dielectric layer is deposited as a film having a thickness of at least 2 microns.

6. The method of claim 1, wherein said dielectric layer is polished by chemical-mechanical polishing to remove surface variations greater than 1000 Angstroms.

7. The method of claim 1, wherein said dielectric layer is thermally matched to the coefficients of expansion of said substrate and said etched wafer.

8. The method of claim 1, wherein said etched wafer is 500 microns in thickness.

9. The method of claim 1, wherein said substrate is 500 microns in thickness.

10. A method of forming a hermetically sealed microelectronic device at the wafer level, comprising:

providing a silicon substrate having associated electronics and at least one metal bond pad;

sputter depositing a pyrex glass film having a thickness of at least 2 microns atop said substrate to form a glass/metal seal;

planarizing said glass film by chemical-mechanical polishing so as to remove surface variations greater than 1000 Angstroms; and

anodically bonding a silicon wafer to said glass film so as to form a glass/silicon seal defining a cavity to house and protect said electronics, whereby said microelectronic device is packaged in its own hermetically sealed container at the wafer level via said glass/silicon seal.

11. The method of claim 10, wherein said silicon substrate and said silicon wafer are each approximately 500 microns in thickness.