High voltage power integrated circuit with level shift operation and without metal crossover
First Claim
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1. A level shift device for electrically coupling a floating voltage circuit with a relatively lower voltage circuit each formed on a common substrate of semiconductor material with said level shift circuit, said level shift circuit comprising:
- a layer of semiconductor material disposed atop said substrate, said semiconductor material being of a first conductivity type and being lightly doped and having an upper surface;
a base region of a second conductivity type opposite to that of said first conductivity type and extending into the upper surface of said layer of semiconductor material to a given depth;
a source region of said first conductivity type formed in said base region and defining a surface channel region between said source region and said layer of semiconductor material;
a source electrode connected to said source region and electrically coupled to said lower voltage circuit;
a gate insulation layer disposed over said channel region;
a conductive gate layer disposed over said gate insulation layer;
a drain contact diffusion region of said first conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said base region;
a drain electrode connected to said drain contact diffusion region;
a further diffusion region of said first conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said drain region and further away from said base region, the portion of said layer of semiconductor material located between said drain contact diffusion region and said further diffusion region defining a conduction region;
an insulating layer formed atop said upper surface of said layer of semiconductor material and between said drain region and said further diffusion region;
a contact electrode disposed atop said further diffusion region and electrically coupled to said floating voltage circuit; and
a conducting resistor layer disposed over said insulating layer between said drain electrode and said contact electrode, thereby defining a resistor that is arranged electrically parallel with said conduction region of said layer of semiconductor material;
the resistance of said conduction region being greater than the resistance of said conductive resistor layer.
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Abstract
Level shift devices are formed in the high voltage termination region of an integrated circuit. The level shift devices provide a connection between the higher voltage, floating circuit and a ground referenced lower voltage circuit. The structure of the level shift devices eliminates the need for a high voltage connector to cross over the low voltage connector.
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Citations
67 Claims
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1. A level shift device for electrically coupling a floating voltage circuit with a relatively lower voltage circuit each formed on a common substrate of semiconductor material with said level shift circuit, said level shift circuit comprising:
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a layer of semiconductor material disposed atop said substrate, said semiconductor material being of a first conductivity type and being lightly doped and having an upper surface; a base region of a second conductivity type opposite to that of said first conductivity type and extending into the upper surface of said layer of semiconductor material to a given depth; a source region of said first conductivity type formed in said base region and defining a surface channel region between said source region and said layer of semiconductor material; a source electrode connected to said source region and electrically coupled to said lower voltage circuit; a gate insulation layer disposed over said channel region; a conductive gate layer disposed over said gate insulation layer; a drain contact diffusion region of said first conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said base region; a drain electrode connected to said drain contact diffusion region; a further diffusion region of said first conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said drain region and further away from said base region, the portion of said layer of semiconductor material located between said drain contact diffusion region and said further diffusion region defining a conduction region; an insulating layer formed atop said upper surface of said layer of semiconductor material and between said drain region and said further diffusion region; a contact electrode disposed atop said further diffusion region and electrically coupled to said floating voltage circuit; and a conducting resistor layer disposed over said insulating layer between said drain electrode and said contact electrode, thereby defining a resistor that is arranged electrically parallel with said conduction region of said layer of semiconductor material; the resistance of said conduction region being greater than the resistance of said conductive resistor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An integrated circuit comprising:
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a floating voltage circuit; a relatively lower voltage circuit; and a level shift device formed in a common substrate with said floating voltage circuit and said lower voltage circuit and comprising; a layer of semiconductor material disposed atop said substrate, said semiconductor material being of a first conductivity type and being lightly doped and having an upper surface; a base region of a second conductivity type opposite to that of said first conductivity type and extending into the upper surface of said layer of semiconductor material to a given depth; a source region of said first conductivity type formed in said base region and defining a surface channel region between said source region and said layer of semiconductor material; a source electrode connected to said source region and electrically coupled to said lower voltage circuit; a gate insulation layer disposed over said channel region; a conductive gate layer disposed over said gate insulation layer; a drain contact diffusion region of said first conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said base region; a drain electrode connected to said drain contact diffusion region; a further diffusion region of said first conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said drain region and further away from said base region, the portion of said layer of semiconductor material located between said base region and said further diffusion region defining a conduction region; an insulating layer formed atop said upper surface of said layer of semiconductor material and between said drain region and said further diffusion region; a contact electrode disposed atop said further diffusion region and electrically coupled to said floating voltage circuit; and a conducting resistor layer disposed over said insulating layer between said drain electrode and said contact electrode, thereby defining a resistor that is arranged electrically parallel with said conduction region of said layer of semiconductor material; the resistance of said conduction region being greater than the resistance of said conductive resistor layer. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A device for electrically coupling a floating voltage circuit with a relatively lower voltage circuit each formed in a common substrate with said MOSFET device, said MOSFET device comprising:
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a layer of semiconductor material of first conductivity type disposed atop said substrate and being lightly doped and having an upper surface; a source diffusion region of said second conductivity type opposite to that of said first conductivity type and formed in said upper surface of said layer of semiconductor material; a source electrode connected to said source region and electrically coupled to said floating voltage circuit; a gate insulation layer disposed over a portion of said upper surface of said layer of semiconductor material adjacent to said source diffusion region; a conductive gate layer disposed over said gate insulation layer; a drain region of said second conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said source diffusion region; a drain electrode disposed atop said drain diffusion and electrically coupled to said lower voltage circuit; a sinker region of said second conductivity type extending from said upper surface of said layer of semiconductor material and extending into said substrate and being laterally spaced away from said drain region and being further spaced away from said source diffusion; a ground electrode connected to said sinker region; an insulating layer disposed atop said upper surface of said layer of semiconductor material between said drain electrode and said ground electrode; and a conductive resistor layer disposed atop said insulating layer and being connected between said ground electrode and said drain electrode. - View Dependent Claims (18, 19, 20, 21)
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22. An integrated circuit comprising:
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a floating voltage circuit formed in a substrate; a resurf diffusion region substantially surrounding said floating voltage circuit; a relatively lower voltage circuit formed in said substrate; and at least one level shift MOSFET device formed in said substrate and electrically coupled between said floating voltage circuit and said lower voltage circuit, said MOSFET device being formed in a gap in said resurf region;
said MOSFET device comprising;a layer of semiconductor material of first conductivity type disposed atop said substrate and being lightly doped and having an upper surface; a source diffusion region of said first conductivity type opposite to that of said first conductivity type and formed in said upper surface of said layer of semiconductor material; a source electrode connected to said source region and electrically coupled to said floating voltage circuit; a gate insulation layer disposed over a portion of said upper surface of said layer of semiconductor material adjacent to said source diffusion region; a conductive gate layer disposed over said gate insulation layer; a drain region of said second conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said source diffusion region; a drain electrode disposed atop said drain diffusion and electrically coupled to said lower voltage circuit; a sinker region of said second conductivity type extending from said upper surface of said layer of semiconductor material and extending into said substrate and being laterally spaced away from said drain region and being further spaced away from said source diffusion; a ground electrode connected to said sinker region; an insulating layer disposed atop said upper surface of said layer of semiconductor material and arranged between said drain electrode and said ground electrode; and a conductive resistor layer disposed atop said insulating layer and being connected between said ground electrode and said drain electrode. - View Dependent Claims (23, 24, 25)
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26. An integrated circuit comprising:
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a floating voltage circuit formed in a substrate; a resurf diffusion region enclosing said high voltage circuit; a relatively lower voltage circuit formed in said substrate; and at least one level shift MOSFET device formed in said substrate and electrically coupled between said high voltage circuit and said low voltage circuit, said resurf region at least partially enclosing said level shift MOSFET device and disposed between said level shift MOSFET device and said floating voltage device;
said MOSFET device comprising;a layer of semiconductor material of first conductivity type disposed atop said substrate and being lightly doped and having an upper surface; a source diffusion region of said first conductivity type opposite to that of said first conductivity type formed in said upper surface of said layer of semiconductor material; a source electrode connected to said source region and electrically coupled to said floating voltage circuit; a gate insulation layer disposed over a portion of said upper surface of said layer of semiconductor material adjacent to said source diffusion region; a conductive gate layer disposed over said gate insulation layer; a drain region of a second conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said source diffusion region; a drain electrode disposed atop said drain diffusion and electrically coupled to said lower voltage circuit; a sinker region of said second conductivity type extending from said upper surface of said layer of semiconductor material and extending into said substrate and being laterally spaced away from said drain region and being further spaced away from said source diffusion; a ground electrode connected to said sinker region; an insulating layer disposed atop said upper surface of said layer of semiconductor material and arranged between said drain electrode and said ground electrode; and a conductive resistor layer disposed atop said insulating layer and being connected between said ground electrode and said drain electrode. - View Dependent Claims (27, 28, 29, 30)
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31. A level shift device for electrically coupling a floating voltage circuit with a relatively lower voltage circuit each formed on a common substrate of semiconductor material with said level shift circuit, said level shift circuit comprising:
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a layer of semiconductor material disposed atop said substrate, said semiconductor material being of a first conductivity type and being lightly doped and having an upper surface; a base region of a second conductivity type opposite to that of said first conductivity type, said base region extending into the upper surface of said layer of semiconductor material to a given depth and having a substantially semicircular configuration; a source region of said first conductivity type formed in said base region and defining a surface channel region between said source region and said layer of semiconductor material; a source electrode connected to said source region and electrically coupled to said lower voltage circuit; a gate insulation layer disposed over said channel region; a conductive gate layer disposed over said gate insulation layer; a drain electrode connected to a portion of said layer of semiconductor material thereby defining a drain region, said drain electrode being laterally spaced away from said base region; a contact electrode connected to another portion of said layer of semiconductor material and electrically coupled to said floating voltage circuit, the portion of said layer of semiconductor material located between said drain electrode and said contact electrode defining a conduction region; and a resistor disposed between said drain electrode and said contact electrode, said resistor being arranged electrically parallel with said conduction region of said layer of semiconductor material. - View Dependent Claims (32, 33, 34, 35, 36, 37, 38)
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39. An integrated circuit comprising:
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a floating voltage circuit; a relatively lower voltage circuit; and a level shift device formed in a common substrate with said floating voltage circuit and said lower voltage circuit and comprising; a layer of semiconductor material disposed atop said substrate, said semiconductor material being of a first conductivity type and being lightly doped and having an upper surface; a base region of a second conductivity type opposite to that of said first conductivity type, said base region extending into the upper surface of said layer of semiconductor material to a given depth and having a substantially semicircular configuration; a source region of said first conductivity type formed in said base region and defining a surface channel region between said source region and said layer of semiconductor material; a source electrode connected to said source region and electrically coupled to said lower voltage circuit; a gate insulation layer disposed over said channel region; a conductive gate layer disposed over said gate insulation layer; a drain electrode connected to a portion of said layer of semiconductor material thereby defining a drain region;
said drain electrode being laterally spaced away from said base region;a drain electrode connected to said drain contact diffusion region; a contact electrode connected to another portion of said layer of semiconductor material and electrically coupled to said floating voltage circuit, the portion of said layer of semiconductor material located between said base region and said further diffusion region defining a conduction region; and a resistor disposed between said drain electrode and said contact electrode, said resistor being arranged electrically parallel with said conduction region of said layer of semiconductor material. - View Dependent Claims (40, 41, 42, 43, 44, 45, 46)
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47. A device for electrically coupling a floating voltage circuit with a relatively lower voltage circuit each formed in a common substrate with said MOSFET device, said MOSFET device comprising:
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a layer of semiconductor material of first conductivity type disposed atop said substrate and being lightly doped and having an upper surface; a source diffusion region of said second conductivity type opposite to that of said first conductivity type and formed in said upper surface of said layer of semiconductor material; a source electrode connected to said source region and electrically coupled to said floating voltage circuit; a gate insulation layer disposed over a portion of said upper surface of said layer of semiconductor material adjacent to said source diffusion region; a conductive gate layer disposed over said gate insulation layer; a drain region of said second conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said source diffusion region; a drain electrode disposed atop said drain diffusion and electrically coupled to said lower voltage circuit; and a resistor connected between said ground electrode and said drain electrode. - View Dependent Claims (48, 49, 50, 51)
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52. An integrated circuit comprising:
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a floating voltage circuit formed in a substrate; a resurf diffusion region substantially surrounding said floating voltage circuit; a relatively lower voltage circuit formed in said substrate; and at least one level shift MOSFET device formed in said substrate and electrically coupled between said floating voltage circuit and said lower voltage circuit, said MOSFET device being formed in a gap in said resurf region;
said MOSFET device comprising;a layer of semiconductor material of first conductivity type disposed atop said substrate and being lightly doped and having an upper surface; a source diffusion region of said first conductivity type opposite to that of said first conductivity type and formed in said upper surface of said layer of semiconductor material; a source electrode connected to said source region and electrically coupled to said floating voltage circuit; a gate insulation layer disposed over a portion of said upper surface of said layer of semiconductor material adjacent to said source diffusion region; a conductive gate layer disposed over said gate insulation layer; a drain region of said second conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said source diffusion region; a drain electrode disposed atop said drain diffusion and electrically coupled to said lower voltage circuit; and a resistor connected between said ground electrode and said drain electrode. - View Dependent Claims (53, 54, 55, 56)
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57. A device for electrically coupling a floating voltage circuit with a relatively lower voltage circuit each formed in a common substrate with said MOSFET device, said MOSFET device comprising:
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a layer of semiconductor material of first conductivity type disposed atop said substrate and being lightly doped and having an upper surface; a source diffusion region of said second conductivity type opposite to that of said first conductivity type, said source diffusion region being formed in said upper surface of said layer of semiconductor material and having a substantially semicircular configuration; a source electrode connected to said source region and electrically coupled to said floating voltage circuit; a gate insulation layer disposed over a portion of said upper surface of said layer of semiconductor material adjacent to said source diffusion region; a conductive gate layer disposed over said gate insulation layer; a drain region of said second conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said source diffusion region; a drain electrode disposed atop said drain diffusion and electrically coupled to said lower voltage circuit; and a resistor connected between said ground electrode and said drain electrode. - View Dependent Claims (58, 59, 60, 61)
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62. An integrated circuit comprising:
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a floating voltage circuit formed in a substrate; a resurf diffusion region enclosing said high voltage circuit; a relatively lower voltage circuit formed in said substrate; and at least one level shift MOSFET device formed in said substrate and electrically coupled between said high voltage circuit and said low voltage circuit, said resurf region at least partially enclosing said level shift MOSFET device and disposed between said level shift MOSFET device and said floating voltage device;
said MOSFET device comprising;a layer of semiconductor material of first conductivity type disposed atop said substrate and being lightly doped and having an upper surface; a source diffusion region of said first conductivity type opposite to that of said first conductivity type, said source diffusion region being formed in said upper surface of said layer of semiconductor material and having a substantially semicircular configuration; a source electrode connected to said source region and electrically coupled to said floating voltage circuit; a gate insulation layer disposed over a portion of said upper surface of said layer of semiconductor material adjacent to said source diffusion region; a conductive gate layer disposed over said gate insulation layer; a drain region of a second conductivity type formed in said upper surface of said layer of semiconductor material and being laterally spaced away from said source diffusion region; a drain electrode disposed atop said drain diffusion and electrically coupled to said lower voltage circuit; and a resistor connected between said ground electrode and said drain electrode. - View Dependent Claims (63, 64, 65, 66, 67)
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Specification