Analog signal processing system and decision logic for controlling airbag deployment

• US 5,801,619 A
• Filed: 09/11/1997
• Issued: 09/01/1998
• Est. Priority Date: 03/04/1996
• Status: Expired due to Term

• Current Assignee: Loopback Technologies, Inc. (Marathon Patent Group, Inc.)
• Original Assignee: Delco Electronics Corporation (Motors Liquidation Co. GUC Trust)
• Inventors: Liu, Jiyao, Kelley, Jon Paul
• Primary Examiner(s): Hofsass, Jeffery A.
• Assistant Examiner(s): Pope, Daryl C.
• Application Number:
  US08/927,588
• Time in Patent Office: 355 Days
• Field of Search: 340/436, 340/429, 340/665, 340/669, 280/735, 280/734, 180/268, 207/29, 207/33, 207/34, 207/36, 207/45, 207/46, 207/47
• US Class Current: 340/436
• CPC Class Codes: B60R 2021/01322 comprising variable thresholds, e.g. depending from other collision parameters
• CPC Class Codes: B60R 21/0132 responsive to vehicle motion parameters , e.g. to vehicle longitudinal or transversal deceleration or speed value
• CPC Class Codes: B60R 21/0133 by integrating the amplitude of the input signal
• CPC Class Codes: B60R 21/01332 by frequency or waveform analysis
• CPC Class Codes: B60R 21/01336 using filtering

Abstract

An analog signal processing system and decision logic for controlling airbag deployment includes low pass filter circuitry, differentiation circuitry and integration circuitry operable to receive an analog acceleration signal and provide a differentiated analog bandpass acceleration signal, a reduced bandpass analog acceleration signal, a low pass analog acceleration signal, an analog velocity signal and an analog displacement signal. An interface circuit receives the foregoing analog signals and converts such signals to a number of logic level signals based on comparison with a number of predefined analog threshold signals. A decision logic circuit receives the converted logic level signals and processes such signals to discriminate between severe and non-severe impact events, and control airbag deployment in accordance therewith.

Claims

1. Circuitry for generating an airbag deployment signal from an analog acceleration signal comprising:

a first filter circuit receiving an analog acceleration signal and providing a first filtered analog signal as a first predefined frequency band thereof;

a differentiation circuit receiving said first filtered analog signal and providing a differentiated analog signal therefrom;

a second filter circuit receiving said first filtered analog signal and providing a second filtered analog signal as a second predefined frequency band thereof; and

a decision circuit receiving said differentiated analog signal and said second filtered analog signal, and providing an airbag deployment signal therefrom.

2. The circuitry of claim 1 wherein said first filter circuit includes:

a first low pass filter receiving said analog acceleration signal and providing only frequency components thereof less than a first predefined frequency as a first analog low pass filter signal;

a second low pass filter receiving said first analog low pass filter signal and providing only frequency components thereof less than a second predefined frequency as a second analog low pass filter signal, wherein said second predefined frequency is less than said first predefined frequency; and

a subtraction circuit receiving said first and second analog low pass filter signals and providing said first filtered analog signal as a difference thereof.

3. The circuitry of claim 1 wherein said second filter circuit includes a low pass filter receiving said first filtered analog signal and providing only frequency components thereof less than an upper frequency limit as said second filtered analog signal.

4. The circuitry of claim 3 wherein said second filter circuit includes means for selecting said upper frequency limit.

5. The circuitry of claim 4 wherein said means for selecting said upper frequency limit of said second predefined frequency band includes threshold circuitry providing an analog low pass filter threshold signal;

and wherein said low pass filter is responsive to said analog low pass filter threshold signal to provide said upper frequency limit as a function thereof.

6. The circuitry of claim 1 wherein said decision circuit includes:

an analog interface circuit receiving said differentiated analog signal, said second filtered analog signal, a first analog threshold signal and a second analog threshold signal, said interface circuit providing said differentiated analog signal as a first logic state if said differentiated analog signal is greater than said first threshold and otherwise providing said differentiated analog signal as a second opposite logic state, said interface circuit providing said second filtered analog signal as a first logic state if said second filtered analog signal is greater than said second analog threshold signal and otherwise providing said second filtered analog signal as a second opposite logic state; and

localized impact discrimination circuitry responsive to logic states of said differentiated analog signal and said second filtered analog signal to provide said airbag deployment signal.

7. The circuitry of claim 6 further including threshold circuitry providing said first and second analog threshold signals as programmable analog signal levels.

8. The circuitry of claim 6 wherein said localized impact discrimination circuitry includes an AND gate having a first input receiving said logic state of said differentiated analog signal and a second input receiving said logic state of said second filtered analog signal, and an output providing said airbag deployment signal in accordance therewith.

9. The circuitry of claim 1 further including an accelerometer circuit providing said analog acceleration signal.

10. Circuitry for generating an airbag deployment signal from an analog acceleration signal comprising:

a filter circuit receiving an analog acceleration signal and providing a first filtered analog signal as a first predefined frequency band thereof, and a second filtered analog signal as a second predefined frequency band thereof;

a differentiation circuit receiving said first filtered analog signal and providing a differentiated analog signal therefrom;

a first integration circuit receiving said second filtered analog signal and providing a first integrated analog signal therefrom; and

a decision circuit receiving said differentiated analog signal, said second filtered analog signal and said first integrated analog signal, and providing an airbag deployment signal therefrom.

11. The circuitry of claim 10 wherein said filter circuit includes:

a first low pass filter receiving said analog acceleration signal and providing only frequency components thereof less than a first predefined frequency as a first analog low pass filter signal;

a second low pass filter receiving said first analog low pass filter signal and providing only frequency components thereof less than a second predefined frequency as said second filtered analog signal, wherein said second predefined frequency is less than said first predefined frequency; and

a subtraction circuit receiving said first analog low pass filter signal and said second filtered analog signal and providing said first filtered analog signal as a difference thereof.

12. The circuitry of claim 10 wherein said decision circuit includes:

an analog interface circuit receiving said differentiated analog signal, said second filtered analog signal and said first integrated analog signal, said analog interface circuit converting said differentiated analog signal, said second filtered analog signal and said first integrated analog signal to logic states, each as a function of at least one corresponding analog threshold signal; and

impact dynamics discrimination circuitry including impact detection circuitry responsive to logic states of said differentiated analog signal, said second filtered analog signal and said first integrated analog signal to provide a first deployment signal therefrom.

13. The circuitry of claim 12 further including threshold circuitry providing a plurality of said analog threshold signals.

14. The circuitry of claim 13 wherein said analog interface circuit includes a first latch circuit receiving said differentiated analog signal and a first one of said plurality of analog threshold signals, said first latch circuit providing said differentiated analog signal as a first logic state if said differentiated analog signal is greater than said first analog threshold signal and otherwise providing said differentiated analog signal as a second opposite logic state.

15. The circuitry of claim 14 wherein said analog interface circuit includes a second latch circuit receiving said second filtered analog signal and a second one of said plurality of analog threshold signals, said second latch circuit providing said second filtered analog signal as a first logic state if said second filtered analog signal is greater than said second analog threshold signal and otherwise providing said second filtered analog signal as a second opposite logic state.

16. The circuitry of claim 15 wherein said analog interface circuit includes a third latch circuit receiving said first integrated analog signal and a third one of said plurality of analog threshold signals, said third latch circuit providing said first integrated analog signal as a first logic state if said first integrated analog signal is greater than said third analog threshold signal and otherwise providing said first integrated analog signal as a second opposite logic state.

17. The circuitry of claim 16 wherein said impact detecting circuitry includes:

a first logic circuit having a first input receiving said logic state of said differentiated analog signal and a second input receiving said logic state of said first integrated analog signal, and an output providing a first logic signal having a first logic state if said differentiated analog signal exceeds said first analog threshold signal prior to said first integrated analog signal exceeding said third analog threshold signal and otherwise having a second opposite logic state; and

an AND gate having a first input receiving said first logic signal, a second input receiving said logic state of said second filtered analog signal and an output providing said first deployment signal in accordance therewith.

18. The circuitry of claim 13 further including a second integration circuit receiving said first integrated analog signal and providing a second integrated analog signal therefrom;

and wherein said impact dynamics discrimination circuitry includes impact severity testing circuitry receiving said second filtered analog signal, said first integrated analog signal and said second integrated analog signal, and providing a second deployment signal therefrom.

19. The circuitry of claim 18 wherein said analog interface circuit includes a first latch circuit receiving said second filtered analog signal and a first one of said plurality of analog threshold signals, said first latch circuit providing said second filtered analog signal as first acceleration signal having a first logic state if said second filtered analog signal is greater than said first analog threshold signal, said first acceleration signal otherwise having a second opposite logic state.

20. The circuitry of claim 19 wherein said analog interface circuit includes a second latch circuit receiving said first integrated analog signal and a second one of said plurality of analog threshold signals, said second latch circuit providing said first integrated analog signal as first velocity signal having a first logic state if said first integrated analog signal is greater than said second analog threshold signal, said first velocity signal otherwise having a second opposite logic state.

21. The circuitry of claim 20 wherein said analog interface circuit includes a first comparator circuit receiving said first integrated analog signal and a third one of said plurality of analog threshold signals, said first comparator circuit providing said first integrated analog signal as second velocity signal having a first logic state if said first integrated analog signal is greater than said third analog threshold signal, said second velocity signal otherwise having a second opposite logic state.

22. The circuitry of claim 21 wherein said analog interface circuit includes a second comparator circuit receiving said first integrated analog signal and a fourth one of said plurality of analog threshold signals, said second comparator circuit providing said first integrated analog signal as third velocity signal having a first logic state if said first integrated analog signal is greater than said fourth analog threshold signal, said third velocity signal otherwise having a second opposite logic state.

23. The circuitry of claim 22 wherein said analog interface circuit includes a third comparator circuit receiving said second integrated analog signal and a fifth one of said plurality of analog threshold signals, said third comparator circuit providing said second integrated analog signal as first displacement signal having a first logic state if said second integrated analog signal is greater than said fifth analog threshold signal, said first displacement signal otherwise having a second opposite logic state.

24. The circuitry of claim 23 wherein said analog interface circuit includes a fourth comparator circuit receiving said second integrated analog signal and a sixth one of said plurality of analog threshold signals, said fourth comparator circuit providing said second integrated analog signal as second displacement signal having a first logic state if said second integrated analog signal is greater than said sixth analog threshold signal, said second displacement signal otherwise having a second opposite logic state.

25. The circuitry of claim 24 wherein said analog interface circuit includes a fifth comparator circuit receiving said second integrated analog signal and a seventh one of said plurality of analog threshold signals, said fifth comparator circuit providing said second integrated analog signal as third displacement signal having a first logic state if said second integrated analog signal is greater than said seventh analog threshold signal, said third displacement signal otherwise having a second opposite logic state.

26. The circuitry of claim 25 wherein said impact severity testing circuitry includes a first logic circuit having a first input receiving said first acceleration signal and a second input receiving said second velocity signal and an output providing a first logic signal having a first logic state if said second velocity signal is greater than said second analog threshold signal when said first acceleration signal is greater than said first analog threshold signal, said first logic signal otherwise having a second opposite logic state.

27. The circuitry of claim 26 wherein said impact severity testing circuitry includes a second logic circuit having a first input receiving said first acceleration signal and a second input receiving said second displacement signal and an output providing a second logic signal having a first logic state if said second displacement signal is greater than said sixth analog threshold signal when said first acceleration signal is greater than said first analog threshold signal, said second logic signal otherwise having a second opposite logic state.

28. The circuitry of claim 27 wherein said impact severity testing circuitry includes a third logic circuit having a first input receiving said first displacement signal and a second input receiving said first velocity signal and an output providing a third logic signal having a first logic state if said first displacement signal is less than said fifth analog threshold signal when said first velocity signal is greater than said second analog threshold signal, said third logic signal otherwise having a second opposite logic state.

29. The circuitry of claim 28 wherein said impact severity testing circuitry includes a fourth logic circuit having a first input receiving said third displacement signal and a second input receiving said third velocity signal and an output providing a fourth logic signal having a first logic state if said third velocity signal is greater than said fourth analog threshold signal when said third displacement signal is greater than said seventh analog threshold signal, said fourth logic signal otherwise having a second opposite logic state.

30. The circuitry of claim 29 further including an OR gate having a first input receiving said first logic signal, a second input receiving said second logic signal, a third input receiving said third logic signal, a fourth input receiving said fourth logic signal and an output providing said second deployment signal in accordance therewith.

31. The circuitry of claim 18 wherein said analog interface circuit includes a latch circuit receiving said first integrated analog signal and a first one of said plurality of analog threshold signals, said first latch circuit providing said first integrated analog signal as first velocity signal having a first logic state if said first integrated analog signal is less than said first analog threshold signal, said velocity signal otherwise having a second opposite logic state.

32. The circuitry of claim 31 wherein said impact dynamics discrimination circuitry includes negative velocity disable logic circuitry receiving said velocity signal and providing a third deployment signal therefrom.

33. The circuitry of claim 32 wherein said negative velocity disable logic circuitry provides said third deployment signal as a first logic signal having a first logic state if said first integrated analog signal is less than said first analog threshold signal, said first logic signal otherwise having a second logic state.

34. The circuitry of claim 32 further including an AND gate having a first input receiving said first deployment signal, a second input receiving said second deployment signal, a third input receiving an inverted representation of said third deployment signal and an output providing said airbag deployment signal in accordance therewith.

35. A method of operating a supplemental inflatable restraint system of a vehicle including an inflatable airbag, the method comprising the steps of:

sensing vehicle acceleration rate information; and

deploying a supplemental inflatable restraint device if

(A) the vehicle acceleration rate information indicates a force loading rate in excess of a threshold force loading rate and the vehicle acceleration rate information contains an energy level above a predefined energy level;

OR

(B) the vehicle acceleration rate information indicates a force loading rate in excess of a threshold force loading rate prior to an impact energy in excess of

a first impact energy level threshold, and an impact force in excess of a first impact force threshold.

36. The method of claim 35 wherein conditional (B) further includes the conditional:

(1) AND

the vehicle acceleration rate information indicates an impact energy in excess of a second impact energy level threshold prior to an impact force in excess of a second impact force threshold.

37. The method of claim 36 wherein conditional (1) further includes the conditional

OR the vehicle acceleration rate information indicates impact energy in excess of said first impact energy level threshold prior to structural displacement structural displacement less than a first structural displacement threshold.

38. The method of claim 37 wherein conditional (1) further includes the conditional

OR the vehicle acceleration rate information indicates an impact force in excess of said second impact force threshold prior to structural displacement greater than a second structural displacement threshold.

39. The method of claim 38 wherein conditional (1) further includes the conditional

OR the vehicle acceleration rate information indicates a structural displacement in excess of a third structural displacement threshold prior to an impact energy in excess of a third impact energy threshold.

40. The method of claim 39 wherein conditional (b) further includes the conditional:

(2) AND the vehicle acceleration rate information indicates that impact energy is detected at either of a front end of the vehicle and from an outside toward an inside of vehicle.