Liquid crystal display device and method for driving the same

• US 5,801,673 A
• Filed: 08/29/1994
• Issued: 09/01/1998
• Est. Priority Date: 08/30/1993
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Shimada, Takayuki, Takafuji, Yutaka, Matsumoto, Toshio, Yamashita, Toshihiro
• Primary Examiner(s): Hjerpe, Richard
• Assistant Examiner(s): TRAN, VUI
• Application Number:
  US08/297,219
• Time in Patent Office: 1,464 Days
• Field of Search: 345/100, 345/197, 345/198, 345/180
• US Class Current: 345/100
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2310/0205 Simultaneous scanning of several lines in flat panels
• CPC Class Codes: G09G 2310/0248 Precharge or discharge of column electrodes before or after applying exact column voltages
• CPC Class Codes: G09G 2310/0283 Arrangement of drivers for different directions of scanning
• CPC Class Codes: G09G 2310/0297 Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 3/2011 by amplitude modulation
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

A liquid crystal display device which includes: a plurality of source bus lines in parallel with each other; a plurality of gate bus lines in parallel with each other, crossing the source bus lines; a switching element connected to one of the plurality of source bus lines and one of the gate bus lines; a pixel portion connected to the switching element; and a source drive circuit for supplying a data signal to the plurality of source bus lines, wherein the source drive circuit has a data signal line connected to the respective source bus lines, and the data signal line forms a closed circuit, thereby making a delay time of the data signal supplied to the plurality of source bus lines uniform is disclosed.

Claims

1. A liquid crystal display device comprising:

a plurality of source bus lines in parallel with each other;

a plurality of gate bus lines in parallel with each other, crossing the source bus lines;

a switching element connected to one of the plurality of source bus lines and one of the plurality of gate bus lines;

a pixel portion connected to the switching element; and

a source drive circuit for supplying a data signal to the plurality of source bus lines,

wherein the source drive circuit has a data signal line connected to the respective source bus lines, and the data signal line forms a closed circuit, thereby making a delay time of the data signal supplied to the plurality of source bus lines uniform.

2. A liquid crystal display device according to claim 1, wherein each of the plurality of source bus lines has a source bus line additional capacitor, and the data signal supplied to each source bus line by the source drive circuit is held by the source bus line additional capacitor and a parasitic capacitance of the source bus line.

3. A liquid crystal display device according to claim 2, wherein the source drive circuit comprises a shift register for sequentially outputting a sampling signal based on a clock signal supplied through a clock signal line and a plurality of sampling means for sampling a data signal based on the sampling signal to output the sampled data signal to each of the plurality of source bus lines,

the respective source bus line additional capacitors are connected to a source bus line additional capacitor common line, and

the clock signal line and the source bus line additional capacitor common line form closed circuits.

4. A liquid crystal display device according to claim 3, wherein a scanning direction of the shift register is changed between a forward direction and a reverse direction.

5. A liquid crystal display device according to claim 3, wherein at least two sampling means of the plurality of sampling means are turned on during an identical period.

6. A liquid crystal display device according to claim 3, further comprising means for adding an overshoot to a rising edge of a waveform of the data signal and an undershoot to a falling edge of the waveform of the data signal.

7. A liquid crystal display device according to claim 3, further comprising means for adjusting a phase difference between the data signal and the clock signal.

8. A projection type liquid crystal display apparatus comprising:

a light source;

three liquid crystal display devices;

a first optical system for splitting light from the light source into three primary-color components to introduce the three primary-color components into the three liquid crystal display devices; and

a second optical system for combining the respective components transmitted through the three liquid crystal display devices,

each of the three liquid crystal display devices including;

a plurality of source bus lines in parallel with each other;

a plurality of gate bus lines in parallel with each other, crossing the plurality of source bus lines;

a switching element connected to one of the plurality of source bus lines and one of the plurality of gate bus lines;

a pixel portion connected to the switching element; and

a source drive circuit for supplying a data signal to the plurality of source bus lines, the source drive circuit including a data signal line connected to the respective source bus lines and a shift register for sequentially outputting a sampling signal based on a clock signal supplied through a clock signal line and a plurality of sampling means for sampling a data signal based on the sampling signal to output the sampled data signal to each of the plurality of source bus lines,

wherein the data signal line forms a closed circuit, thereby making a delay time of the data signal supplied to the plurality of source bus lines uniform, and

a scanning direction of the shift register is changed between a forward direction and a reverse direction, and the scanning direction of one of the three liquid crystal display devices being opposite to the scanning direction of the other liquid crystal display devices.

9. A liquid crystal display device comprising:

a plurality of source bus lines in parallel with each other;

a plurality of gate bus lines in parallel with each other, crossing the source bus lines;

a switching element connected to one of the plurality of source bus lines and one of the plurality of gate bus lines;

a pixel portion connected to the switching element; and

a source drive circuit for supplying a data signal to the plurality of source bus lines,

wherein the source drive circuit includes a shift register for sequentially outputting a sampling signal and a plurality of sampling means for sampling the data signal based on the sampling signal to output the sampled data signal to each of the plurality of source bus lines,

the source drive circuit includes a data line branched into a first branch line and a second branch line, the plurality of sampling means being grouped into a first group connected to the first branch line and a second group connected to the second branch line,

each of the sampling means belonging to the same group is turned on during a different period and

the number of data signal branch lines is larger than the number of sampling means which are simultaneously sampling.

10. A liquid crystal display device according to claim 9, wherein each of the plurality of source bus lines has a source bus line additional capacitor, and the data signal supplied to each source bus line by the source drive circuit is held by the source bus line additional capacitor and a parasitic capacitance of the source bus line.

11. A liquid crystal display device according to claim 10, wherein the data line further includes a third branch line, and the plurality of sampling means have the first group, the second group, and a third group connected to the third branch line.

12. A liquid crystal display device according to claim 10, wherein the plurality of sampling means belonging to different groups are turned on during an identical period.

13. A liquid crystal display device according to claim 10, wherein the source drive circuit supplies data signals with polarity alternately inverted for each gate bus line.

14. A liquid crystal display device according to claim 10, wherein the plurality of source bus line additional capacitors are connected to a source bus line additional capacitor common line, the source bus line additional capacitor common line having first and second branch source bus line additional capacitor common lines, and

the plurality of source bus lines have a first group connected to the first branch source bus line additional capacitor common line and a second group connected to the second branch source bus line additional capacitor common line.

15. A liquid crystal display device according to claim 10, wherein the number of the groups of the sampling means is the same as the number of the groups of the source bus lines, and the source bus lines belonging to different groups are connected to the sampling means belonging to different groups.

16. A method for driving a liquid crystal display device comprising:

a plurality of source bus lines in parallel with each other;

a plurality of gate bus lines in parallel with each other, crossing the source bus lines;

a switching element connected to one of the plurality of source bus lines and one of the plurality of gate bus lines;

a pixel portion connected to the switching element; and

a source drive circuit for supplying a data signal to the plurality of source bus lines,

wherein the source drive circuit includes a shift register for sequentially outputting a sampling signal and a plurality of sampling means for sampling the data signal based on the sampling signal to output the sampled data signal to each of the plurality of source bus lines,

an even number of sampling means simultaneously samples the data signal based on one sampling signal, thereby generating an even number of sampled data signals,

the even number of sampled data signals are output to the plurality of source bus lines under a condition that polarity of at least one of the data signals of the even number of sampled data signals are made opposite to a polarity of other data signals of the even number of sampled data signals, and

the source lines to which the at least one of the data signals of the even number of sampled data signals are outputted are predetermined such that the combination of the polarities of the even number of sampled data signals prevent bright point defects.

17. A method for driving a liquid crystal display device according to claim 16, wherein each of the plurality of source bus lines has a source bus line additional capacitor, and the data signal supplied to each source bus line by the source drive circuit is held by the source bus line additional capacitor and a parasitic capacitance of the source bus line, and

the source bus line additional capacitors of the source bus lines connected to the even number of sampling means for simultaneous sampling based on the one sampling signal are connected to the same source bus line additional capacitor common line.

18. A method for driving a liquid crystal display device according to claim 16, wherein a combination of the polarity of the half of the data signals of the even number data signals simultaneously sampled based on the one sampling signal and the polarity of the other half of the data signals of the even number data signals is selected based on the number of defects caused in adjacent pixels.

19. A method for driving a liquid crystal display device according to claim 16, wherein a combination of the polarity of the half of the data signals of the even number of data signals simultaneously sampled based on the one sampling signal and the polarity of the other half of the data signals of the even number of data signal is the same with respect to all of the sampling signals.

20. A method for driving a liquid crystal display device according to claim 16, wherein a combination of the polarity of the half of the data signals of the even number of data signals simultaneously sampled based on the one sampling signal and the polarity of the other half of the data signals of the even number of data signals is selected based on the number of defects caused in adjacent pixels per sampling signal.

21. A method for driving a liquid crystal display device according to claim 16, wherein the liquid crystal display device is a monochromic display device.

22. A method for driving a liquid crystal display device according to claim 16, wherein the number of the plurality of pixels connected to each of the plurality of gate bus lines in the liquid crystal display device is at least 600.

23. A method for driving a liquid crystal display device as in claim 16, wherein the polarities of pairs of adjacent source lines are coincident.

24. A method for driving a liquid crystal display device as in claim 16, wherein the polarities of four adjacent source lines are selected from (++--), (+--+), and (-++-).