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Information processing system and including a supplemental memory and method of operation

  • US 5,802,562 A
  • Filed: 03/22/1996
  • Issued: 09/01/1998
  • Est. Priority Date: 10/01/1993
  • Status: Expired due to Fees
First Claim
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1. An information processing system, comprising:

  • a processor;

    a bus for communicating information;

    a system memory coupled to the bus for storing at least a subset of the information;

    a prefetch memory;

    a cache memory, integral to said processor; and

    circuitry coupled to the bus and to the prefetch and cache memories for;

    storing first information from the system memory into the prefetch memory in response to a prefetch instruction requesting only the first information;

    storing second information into the cache memory in response to a memory instruction requesting the second information, the second information being provided directly from the prefetch memory, independent of said bus, when the first information includes the second information, otherwise the second information being from the system memory without being added to the prefetch memory; and

    maintaining coherency of the first information in the prefetch memory in response to address information from the bus.

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