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Method and system for predicting addresses and prefetching data into a cache memory

  • US 5,802,566 A
  • Filed: 11/16/1993
  • Issued: 09/01/1998
  • Est. Priority Date: 05/02/1991
  • Status: Expired due to Term
First Claim
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1. A prefetching apparatus useful in association with a computer system having at least one processor, a memory device, and a cache memory coupled to said at least one processor, said apparatus comprising:

  • a stream-detector configured to compare a requested memory address associated with data requested by said at least one processor to a predicted memory address derived from a previously requested memory address according to each of at least one memory address pattern; and

    a prefetcher configured to prefetch new data from the memory device and to store said data in the cache memory, said new data prefetched from a next memory address computed from said requested memory address and a corresponding one of the at least one memory address pattern upon a condition in which the requested memory address is accurately represented by the predicted memory address of the corresponding memory address pattern, said new data prefetched in anticipation of a request for said new data from said at least one processor;

    wherein upon the condition that there is a cache hit for the requested data in the cache memory, N new data is prefetched, where N is at least 1 and upon the condition that there is a cache miss for the requested data in the cache memory, M new data is prefetched, where M is greater than N.

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