Batched checking of shared memory accesses
First Claim
1. In a computer system including a plurality of workstations, each workstation including a processor, a memory having addresses, and an input/output interface connected to each other by a bus, the input/output interfaces connecting the workstations to each other by a network, a software implemented method for batching access checks to shared data stored in the memories, comprising the steps of:
- designating a set of the addresses of the memories as virtual shared addresses to store shared data;
allocating a portion of the virtual shared addresses to store a shared data structure as one or more lines accessible by instructions of programs executing in any of the processors, the size of each line being a predetermined number of bytes;
analyzing the programs to locate a set of instructions of a particular program which access a range of target addresses storing shared data, the range of target addresses being no greater than the size of one line; and
in response to determining that accesses to the shared data stored at a first and last addresses of the range of target addresses are valid, executing the set of instructions.
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Accused Products
Abstract
In a distributed shared memory computer system a plurality of workstations are connected to each other by a network. Each workstation includes a processor, a memory having addresses, and an input/output interface connected to each other by a bus. The input/output interfaces connect the workstations to each other by the network. In a software implemented method for batching access checks to shared data stored in the memories, a set of the addresses of the memories are designated virtual shared addresses to store shared data. A portion of the virtual shared addresses is allocated to store a shared data structure as one or more lines accessible by instructions of the programs executing in any of the processors, the size of each line being a predetermined number of bytes. The programs are analyzed to locate a set of instructions of a particular program which access a range of target addresses storing shared data, the range of target addresses being no greater than the size of one line. In response to determining that accesses to the shared data stored at a first and last addresses of the range of target addresses are valid, the set of instructions are executed. If accesses to the shared data stored at the first or last addresses of the range of target addresses are invalid, miss handling is executed before executing the set of instructions.
171 Citations
26 Claims
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1. In a computer system including a plurality of workstations, each workstation including a processor, a memory having addresses, and an input/output interface connected to each other by a bus, the input/output interfaces connecting the workstations to each other by a network, a software implemented method for batching access checks to shared data stored in the memories, comprising the steps of:
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designating a set of the addresses of the memories as virtual shared addresses to store shared data; allocating a portion of the virtual shared addresses to store a shared data structure as one or more lines accessible by instructions of programs executing in any of the processors, the size of each line being a predetermined number of bytes; analyzing the programs to locate a set of instructions of a particular program which access a range of target addresses storing shared data, the range of target addresses being no greater than the size of one line; and in response to determining that accesses to the shared data stored at a first and last addresses of the range of target addresses are valid, executing the set of instructions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for batch checking access instructions to shared addresses of a memory storing data to be shared by a plurality of processors, comprising the steps of:
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analyzing executable programs to locate a set of access instructions of one of said programs for accessing a range of the shared addresses; determining if access to data stored within the range of shared addresses is valid; and executing said located set of access instructions if said access to the data stored within the range of shared addresses is determined to be valid. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A system for checking access instructions to shared addresses of a memory comprising:
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at least one memory having a plurality of addresses at which data to be shared by multiple processors is stored; and a first of the multiple processors configured to; analyze an executable program to locate access instructions of said program for accessing shared addresses; determine if access to said data stored at the addresses is valid; and execute said located access instructions if said access is determined to be valid. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26)
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Specification