Body contacted SOI MOSFET

• US 5,804,858 A
• Filed: 09/27/1996
• Issued: 09/08/1998
• Est. Priority Date: 06/08/1995
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Hsu, Ching-Hsiang, Liang, Mong-Song
• Primary Examiner(s): Wallace, Valencia Martin
• Application Number:
  US08/721,667
• Time in Patent Office: 711 Days
• Field of Search: 257/347, 257/351, 257/369, 257/374, 257/66, 257/372, 437/21, 437/41, 437/44
• US Class Current: 257/347
• CPC Class Codes: H01L 29/66772 Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates H01L29/66666 takes precedence; thin film FinFETs H01L29/66795
• CPC Class Codes: H01L 29/7841 with floating body, e.g. programmable transistors
• CPC Class Codes: H01L 29/78612 for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile

Abstract

A new method of forming a silicon-on-insulator device having a body node contact is described. Active areas are isolated from one another within a silicon-on-insulator layer. Adjacent active areas are doped with dopants of opposite polarities to form at least one n-channel active area and at least one p-channel active area. Gate electrodes are formed over each active area. The area directly underlying the gate electrode and extending downward to the insulator layer comprises the body node. Lightly doped areas are formed beneath the spacers on the sidewalls of the gate electrodes. First ions are implanted into the active areas not covered by a mask whereby source and drain regions are formed in the at least one n-channel active area and whereby a p-channel body contact region is formed within the at least one p-channel active area wherein the p-channel body contact region contacts the p-channel body node. Second ions are implanted into the active areas not covered by a mask whereby source and drain regions are formed in the at least one p-channel active area and whereby an n-channel body contact region is formed within the at least one n-channel active area wherein the n-channel body contact region contacts the n-channel body node. The semiconductor substrate is annealed to complete formation of the silicon-on-insulator device having a body node contact in the manufacture of an integrated circuit.

Claims

1. A silicon-on-insulator body node contacted device comprising:

a semiconductor substrate having an insulator layer thereover;

a silicon layer overlying said insulator layer comprising isolation areas between active areas wherein adjacent active areas have opposite polarities;

a polysilicon gate electrode having a gate oxide thereunder and having silicon oxide sidewalls and dielectric spacers on said sidewalls overlying each of said active areas wherein a portion of each of said active areas directly underlying said gate electrode and extending downward to said insulator layer comprises said body node of said silicon-on-insulator body node contacted device;

source and drain regions lying within said silicon layer on either side of said body node in each of said active areas;

a body node contact region replacing a cross-sectional portion of said source region but not said drain region in each of said active areas wherein said body node contact region contacts said body node and wherein said body node contact region has a polarity opposite to the polarity of said source region; and

lightly doped regions lying within said silicon layer underlying said dielectric spacers wherein said lightly doped regions do not extend all the way downward to said insulator layer.

3. The device according to claim 1 further comprising:

an insulating layer overlying said silicon layer and said polysilicon gate electrodes; and

a patterned conducting layer extending downward through said insulating layer to contact said source and drain regions.

4. The device according to claim 1 wherein said adjacent active areas having said opposite polarities comprise a first active area having an N-type polarity and a second active area having a P-type polarity and wherein said body node contact region within said source region of said first active area has a P-type polarity and wherein said body node contact region within said source region of said second active area has an N-type polarity.

2. A silicon-on-insulator body node contacted device comprising:

a semiconductor substrate having an insulator layer thereover;

a silicon layer overlying said insulator layer comprising isolation areas between active areas wherein adjacent active areas have opposite polarities;

a polysilicon gate electrode having a gate oxide thereunder and having silicon oxide sidewalls and dielectric spacers on said sidewalls overlying each of said active areas wherein a portion of each of said active areas directly underlying said gate electrode and extending downward to said insulator layer comprises said body node of said silicon-on-insulator body node contacted device;

source and drain regions lying within said silicon layer on either side of said body node in each of said active areas;

a body node contact region replacing a cross-sectional portion of said source region but not said drain region in each of said active areas wherein said body node contact region contacts said body node and wherein said body node contact region has a polarity opposite to the polarity of said source region; and

lightly doped regions lying within said silicon layer underlying said dielectric spacers and having the same polarity as said source and drain regions wherein said lightly doped regions do not extend all the way downward to said insulator layer and wherein said lightly doped regions act as extensions for said source and drain providing for current flowing between said source and said drain to be collected in the area next to said body node contact region.

5. The device according to claim 2 further comprising:

an insulating layer overlying said silicon layer and said polysilicon gate electrodes; and

a patterned conducting layer extending downward through said insulating layer to contact said source and drain regions.

6. The device according to claim 2 wherein said adjacent active areas having said opposite polarities comprise a first active area having an N-type polarity and a second active area having a P-type polarity and wherein said body node contact region within said source region of said first active area has a P-type polarity and wherein said body node contact region within said source region of said second active area has an N-type polarity.