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Time-division data multiplexer with feedback for clock cross-over adjustment

  • US 5,805,089 A
  • Filed: 10/21/1996
  • Issued: 09/08/1998
  • Est. Priority Date: 09/05/1996
  • Status: Expired due to Term
First Claim
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1. A time-division multiplexer with an adjustable clock cross-over voltage, comprising:

  • a multi-phase clock generator comprising a plurality of select clock outputs with different phases;

    a plurality of data inputs;

    first and second data outputs;

    a first set of gating transistors which is coupled between the first data output and a common node, with each transistor in the first set being gated by a corresponding data input and at least one corresponding select clock output;

    a second set of gating transistors which is coupled between the second data output and the common node, with each transistor in the second set being gated by a corresponding data input and at least one corresponding select clock output;

    a first current source coupled to the common node;

    a reference voltage generator; and

    an amplifier comprising a first input coupled to the common node, a second input coupled to the reference voltage generator and a cross-over control output coupled to the plurality of select clock outputs for adjusting cross-over of the select clock outputs.

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